On 01/09/2018 03:28 PM, Paulo Zanoni wrote:
From: Kelvin Gardiner <kelvin.gardi...@intel.com>
ICL 11 has a greater number of maximum subslices. This patch updates the
subslice max define to reflect this.
Bspec: 21139
Reviewed-by: Oscar Mateo <oscar.ma...@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
Signed-off-by: Kelvin Gardiner <kelvin.gardi...@intel.com>
Hmmm... my r-b does not stand. This also needs a GEN11 update to all the
fields in GEN8_MCR_SELECTOR (and a "Bspec: 21108" tag)
---
drivers/gpu/drm/i915/intel_ringbuffer.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 2a8823166a0b..029093a54cd3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -82,7 +82,7 @@ hangcheck_action_to_str(const enum
intel_engine_hangcheck_action a)
}
#define I915_MAX_SLICES 3
-#define I915_MAX_SUBSLICES 3
+#define I915_MAX_SUBSLICES 8
#define instdone_slice_mask(dev_priv__) \
(INTEL_GEN(dev_priv__) == 7 ? \
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