The cap check should be specifically for bit 0 instead of any bit.
Cc: Rodrigo Vivi <rodrigo.v...@intel.com>
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
---
drivers/gpu/drm/i915/intel_psr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index a1b878449e83..83874bcd1142 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -107,7 +107,7 @@ void intel_psr_init_dpcd(struct intel_dp *intel_dp)
DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP,
&frame_sync_cap) != 1)
frame_sync_cap = 0;
- dev_priv->psr.aux_frame_sync = frame_sync_cap ? true : false;
+ dev_priv->psr.aux_frame_sync = frame_sync_cap &
DP_AUX_FRAME_SYNC_CAP;
/* PSR2 needs frame sync as well */
dev_priv->psr.psr2_support = dev_priv->psr.aux_frame_sync;
DRM_DEBUG_KMS("PSR2 %s on sink",
--
2.14.1
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