On Tue, Feb 13, 2018 at 04:29:17PM -0800, José Roberto de Souza wrote:
> data_reg was not being used but it can be used to reduce the number of
> calls to hsw_dip_data_reg() and just increment the reg by the size of
> uint32.
>
> Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_hdmi.c | 12 ++++--------
> 1 file changed, 4 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_hdmi.c
> b/drivers/gpu/drm/i915/intel_hdmi.c
> index f5d7bfb43006..ef258eac8ae8 100644
> --- a/drivers/gpu/drm/i915/intel_hdmi.c
> +++ b/drivers/gpu/drm/i915/intel_hdmi.c
> @@ -393,15 +393,11 @@ static void hsw_write_infoframe(struct drm_encoder
> *encoder,
> I915_WRITE(ctl_reg, val);
>
> mmiowb();
> - for (i = 0; i < len; i += 4) {
> - I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder,
> - type, i >> 2), *data);a
i>>2 != 0
just kill 'data_reg'
> - data++;
> - }
> + for (i = 0; i < len; i += 4, data++, data_reg.reg += 4)
> + I915_WRITE(data_reg, *data);
> /* Write every possible data byte to force correct ECC calculation. */
> - for (; i < data_size; i += 4)
> - I915_WRITE(hsw_dip_data_reg(dev_priv, cpu_transcoder,
> - type, i >> 2), 0);
> + for (; i < data_size; i += 4, data_reg.reg += 4)
> + I915_WRITE(data_reg, 0);
> mmiowb();
>
> val |= hsw_infoframe_enable(type);
> --
> 2.16.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Ville Syrjälä
Intel OTC
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