On Wed, 14 Feb 2018, Anusha Srivatsa <anusha.sriva...@intel.com> wrote: > Forward Error Correction is supported on DP 1.4. > This patch adds corresponding DPCD register definitions. > > v2: Add dri-devel mailing list to the CC list(Jani) > > v3: Change names, add missing masks (Manasi) > > v4: Add missing shifts to mask (Manasi) > > v5: Arrange the definitions in ascending order > of the address (Jani) > > v6: remove unnecessary definitions. Add missing masks, > add "/* 1.4 */" to offset definitions. (Jani) > > Cc: dri-de...@lists.freedesktop.org > Cc: Ville Syrjala <ville.syrj...@linux.intel.com> > Cc: Jani Nikula <jani.nik...@linux.intel.com> > Cc: Manasi Navare <manasi.d.nav...@intel.com> > Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
Pushed to drm-misc-next, thanks for the patch. BR, Jani. > --- > include/drm/drm_dp_helper.h | 30 ++++++++++++++++++++++++++++++ > 1 file changed, 30 insertions(+) > > diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h > index c239e6e..4de97e9 100644 > --- a/include/drm/drm_dp_helper.h > +++ b/include/drm/drm_dp_helper.h > @@ -329,6 +329,13 @@ > # define DP_DS_12BPC 2 > # define DP_DS_16BPC 3 > > +/* DP Forward error Correction Registers */ > +#define DP_FEC_CAPABILITY 0x090 /* 1.4 */ > +# define DP_FEC_CAPABLE (1 << 0) > +# define DP_FEC_UNCORR_BLK_ERROR_COUNT_CAP (1 << 1) > +# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2) > +# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3) > + > /* link configuration */ > #define DP_LINK_BW_SET 0x100 > # define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */ > @@ -445,6 +452,19 @@ > #define DP_UPSTREAM_DEVICE_DP_PWR_NEED 0x118 /* 1.2 */ > # define DP_PWR_NOT_NEEDED (1 << 0) > > +#define DP_FEC_CONFIGURATION 0x120 /* 1.4 */ > +# define DP_FEC_READY (1 << 0) > +# define DP_FEC_ERR_COUNT_SEL_MASK (7 << 1) > +# define DP_FEC_ERR_COUNT_DIS (0 << 1) > +# define DP_FEC_UNCORR_BLK_ERROR_COUNT (1 << 1) > +# define DP_FEC_CORR_BLK_ERROR_COUNT (2 << 1) > +# define DP_FEC_BIT_ERROR_COUNT (3 << 1) > +# define DP_FEC_LANE_SELECT_MASK (3 << 4) > +# define DP_FEC_LANE_0_SELECT (0 << 4) > +# define DP_FEC_LANE_1_SELECT (1 << 4) > +# define DP_FEC_LANE_2_SELECT (2 << 4) > +# define DP_FEC_LANE_3_SELECT (3 << 4) > + > #define DP_AUX_FRAME_SYNC_VALUE 0x15c /* eDP 1.4 */ > # define DP_AUX_FRAME_SYNC_VALID (1 << 0) > > @@ -620,6 +640,16 @@ > #define DP_TEST_SINK 0x270 > # define DP_TEST_SINK_START (1 << 0) > > +#define DP_FEC_STATUS 0x280 /* 1.4 */ > +# define DP_FEC_DECODE_EN_DETECTED (1 << 0) > +# define DP_FEC_DECODE_DIS_DETECTED (1 << 1) > + > +#define DP_FEC_ERROR_COUNT_LSB 0x0281 /* 1.4 */ > + > +#define DP_FEC_ERROR_COUNT_MSB 0x0282 /* 1.4 */ > +# define DP_FEC_ERROR_COUNT_MASK 0x7F > +# define DP_FEC_ERR_COUNT_VALID (1 << 7) > + > #define DP_PAYLOAD_TABLE_UPDATE_STATUS 0x2c0 /* 1.2 MST */ > # define DP_PAYLOAD_TABLE_UPDATED (1 << 0) > # define DP_PAYLOAD_ACT_HANDLED (1 << 1) -- Jani Nikula, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
