On 08/03/18 16:16, Chris Wilson wrote:
Originally we were inlining gen8_cs_irq_handler() and so expected the
compiler to constant-fold away the irq_shift (so we had hardcoded it as
opposed to use engine->irq_shift). However, we dropped the inline given
the proliferation of gen8_cs_irq_handler()s. If we pull the shifting
of the iir into the caller, we can shrink the code still further:

add/remove: 0/0 grow/shrink: 0/3 up/down: 0/-34 (-34)
Function                                     old     new   delta
gen8_cs_irq_handler                          123     118      -5
gen8_gt_irq_handler                          261     248     -13
gen11_irq_handler                            722     706     -16

Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Cc: Tvrtko Ursulin <tvrtko.ursu...@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>
---
  drivers/gpu/drm/i915/i915_irq.c | 18 +++++++++---------
  1 file changed, 9 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index babf81cf668b..84c0043e1637 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1399,19 +1399,19 @@ static void snb_gt_irq_handler(struct drm_i915_private 
*dev_priv,
  }
static void
-gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir, int test_shift)
+gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir)
  {
        struct intel_engine_execlists * const execlists = &engine->execlists;
        bool tasklet = false;
- if (iir & (GT_CONTEXT_SWITCH_INTERRUPT << test_shift)) {
+       if (iir & GT_CONTEXT_SWITCH_INTERRUPT) {
                if (READ_ONCE(engine->execlists.active)) {
                        __set_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted);
                        tasklet = true;
                }
        }
- if (iir & (GT_RENDER_USER_INTERRUPT << test_shift)) {
+       if (iir & GT_RENDER_USER_INTERRUPT) {
                notify_ring(engine);
                tasklet |= USES_GUC_SUBMISSION(engine->i915);
        }
@@ -1466,21 +1466,21 @@ static void gen8_gt_irq_handler(struct drm_i915_private 
*i915,
  {
        if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {
                gen8_cs_irq_handler(i915->engine[RCS],
-                                   gt_iir[0], GEN8_RCS_IRQ_SHIFT);
+                                   gt_iir[0] >> GEN8_RCS_IRQ_SHIFT);
                gen8_cs_irq_handler(i915->engine[BCS],
-                                   gt_iir[0], GEN8_BCS_IRQ_SHIFT);
+                                   gt_iir[0] >> GEN8_BCS_IRQ_SHIFT);
        }
if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {
                gen8_cs_irq_handler(i915->engine[VCS],
-                                   gt_iir[1], GEN8_VCS1_IRQ_SHIFT);
+                                   gt_iir[1] >> GEN8_VCS1_IRQ_SHIFT);
                gen8_cs_irq_handler(i915->engine[VCS2],
-                                   gt_iir[1], GEN8_VCS2_IRQ_SHIFT);
+                                   gt_iir[1] >> GEN8_VCS2_IRQ_SHIFT);
        }
if (master_ctl & GEN8_GT_VECS_IRQ) {
                gen8_cs_irq_handler(i915->engine[VECS],
-                                   gt_iir[3], GEN8_VECS_IRQ_SHIFT);
+                                   gt_iir[3] >> GEN8_VECS_IRQ_SHIFT);
        }
if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
@@ -2765,7 +2765,7 @@ static void __fini_wedge(struct wedge_me *w)
  static __always_inline void
  gen11_cs_irq_handler(struct intel_engine_cs * const engine, const u32 iir)
  {
-       gen8_cs_irq_handler(engine, iir, 0);
+       gen8_cs_irq_handler(engine, iir);

Could potentially drop gen11_cs_irq_handler entirely since now it is identical to gen8_cs_irq_handler, but either way:

Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com>

Daniele

  }
static void

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to