Prepare to allow the GuC submission to be run from underneath a
hardirq timer context (and not just the current softirq context) as is
required for fast preemption resets.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_guc_submission.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c
b/drivers/gpu/drm/i915/intel_guc_submission.c
index dc6782391f9f..994082712181 100644
--- a/drivers/gpu/drm/i915/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/intel_guc_submission.c
@@ -689,10 +689,11 @@ static void guc_dequeue(struct intel_engine_cs *engine)
struct i915_request *last = NULL;
const struct execlist_port * const last_port =
&execlists->port[execlists->port_mask];
+ unsigned long flags;
bool submit = false;
struct rb_node *rb;
- spin_lock_irq(&engine->timeline->lock);
+ spin_lock_irqsave(&engine->timeline->lock, flags);
rb = execlists->first;
GEM_BUG_ON(rb_first(&execlists->queue) != rb);
@@ -763,7 +764,7 @@ static void guc_dequeue(struct intel_engine_cs *engine)
GEM_BUG_ON(execlists->first && !port_isset(execlists->port));
unlock:
- spin_unlock_irq(&engine->timeline->lock);
+ spin_unlock_irqrestore(&engine->timeline->lock, flags);
}
static void guc_submission_tasklet(unsigned long data)
--
2.17.0
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