On Wed, Apr 25, 2018 at 02:58:34PM -0700, Dhinakaran Pandiyan wrote:
> With sink-crc now being relevant only for PSR static frames, move the
> code to intel_psr.c and rename the function.
>
> v2: Rebased.
> Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandi...@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
> drivers/gpu/drm/i915/intel_dp.c | 36 ------------------------------------
> drivers/gpu/drm/i915/intel_drv.h | 2 +-
> drivers/gpu/drm/i915/intel_psr.c | 36 ++++++++++++++++++++++++++++++++++++
> 4 files changed, 39 insertions(+), 39 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index e4ba6527c16e..a84f410ad722 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2786,7 +2786,7 @@ static int i915_sink_crc(struct seq_file *m, void *data)
> intel_dp = enc_to_intel_dp(state->best_encoder);
> vrefresh = crtc_state->base.adjusted_mode.vrefresh;
>
> - ret = intel_dp_sink_crc(intel_dp, vrefresh, crc);
> + ret = intel_psr_sink_crc(intel_dp, vrefresh, crc);
> if (ret)
> goto err;
>
> @@ -4856,7 +4856,7 @@ static const struct drm_info_list i915_debugfs_list[] =
> {
> {"i915_ppgtt_info", i915_ppgtt_info, 0},
> {"i915_llc", i915_llc, 0},
> {"i915_edp_psr_status", i915_edp_psr_status, 0},
> - {"i915_sink_crc_eDP1", i915_sink_crc, 0},
> + {"i915_edp_psr_sink_crc", i915_sink_crc, 0},
> {"i915_energy_uJ", i915_energy_uJ, 0},
> {"i915_runtime_pm_status", i915_runtime_pm_status, 0},
> {"i915_power_domain_info", i915_power_domain_info, 0},
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 3ab3f82e33f6..ff7522d3632e 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -3876,42 +3876,6 @@ intel_dp_configure_mst(struct intel_dp *intel_dp)
> intel_dp->is_mst);
> }
>
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, int vrefresh, u8 *crc)
> -{
> - int count = 0, ret = 0, attempts;
> - int half_frame_us = DIV_ROUND_UP(1000000/2, vrefresh);
> -
> - for (attempts = 0; attempts < 3 && count == 0; attempts++) {
> - u8 buf;
> -
> - /* Wait for approximately half a frame, we cannot wait for a
> - * vblank interrupt as it triggers PSR exit.
> - */
> - if (attempts)
> - usleep_range(half_frame_us, half_frame_us + 100);
> -
> - if (drm_dp_dpcd_readb(&intel_dp->aux,
> - DP_TEST_SINK_MISC, &buf) < 0) {
> - ret = -EIO;
> - goto out;
> - }
> - count = buf & DP_TEST_COUNT_MASK;
> - }
> -
> - if (attempts == 3) {
> - ret = -ETIMEDOUT;
> - goto out;
> - }
> -
> - if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) != 6) {
> - ret = -EIO;
> - goto out;
> - }
> -
> -out:
> - return ret;
> -}
> -
> static bool
> intel_dp_get_sink_irq(struct intel_dp *intel_dp, u8 *sink_irq_vector)
> {
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 48073be8a023..d4e5a407777f 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1644,7 +1644,6 @@ void intel_dp_sink_dpms(struct intel_dp *intel_dp, int
> mode);
> void intel_dp_encoder_reset(struct drm_encoder *encoder);
> void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
> void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> -int intel_dp_sink_crc(struct intel_dp *intel_dp, int vrefresh, u8 *crc);
> bool intel_dp_compute_config(struct intel_encoder *encoder,
> struct intel_crtc_state *pipe_config,
> struct drm_connector_state *conn_state);
> @@ -1900,6 +1899,7 @@ void intel_psr_compute_config(struct intel_dp *intel_dp,
> struct intel_crtc_state *crtc_state);
> void intel_psr_irq_control(struct drm_i915_private *dev_priv, bool debug);
> void intel_psr_irq_handler(struct drm_i915_private *dev_priv, u32 psr_iir);
> +int intel_psr_sink_crc(struct intel_dp *intel_dp, int vrefresh, u8 *crc);
>
> /* intel_runtime_pm.c */
> int intel_power_domains_init(struct drm_i915_private *);
> diff --git a/drivers/gpu/drm/i915/intel_psr.c
> b/drivers/gpu/drm/i915/intel_psr.c
> index 0d548292dd09..8b3a3459eae5 100644
> --- a/drivers/gpu/drm/i915/intel_psr.c
> +++ b/drivers/gpu/drm/i915/intel_psr.c
> @@ -197,6 +197,42 @@ static u8 intel_dp_get_sink_sync_latency(struct intel_dp
> *intel_dp)
> return val;
> }
>
> +int intel_psr_sink_crc(struct intel_dp *intel_dp, int vrefresh, u8 *crc)
> +{
> + int count = 0, ret = 0, attempts;
> + int half_frame_us = DIV_ROUND_UP(1000000/2, vrefresh);
> +
> + for (attempts = 0; attempts < 3 && count == 0; attempts++) {
> + u8 buf;
> +
> + /* Wait for approximately half a frame, we cannot wait for a
> + * vblank interrupt as it triggers PSR exit.
> + */
> + if (attempts)
> + usleep_range(half_frame_us, half_frame_us + 100);
> +
> + if (drm_dp_dpcd_readb(&intel_dp->aux,
> + DP_TEST_SINK_MISC, &buf) < 0) {
> + ret = -EIO;
> + goto out;
> + }
> + count = buf & DP_TEST_COUNT_MASK;
> + }
> +
> + if (attempts == 3) {
> + ret = -ETIMEDOUT;
> + goto out;
> + }
> +
> + if (drm_dp_dpcd_read(&intel_dp->aux, DP_TEST_CRC_R_CR, crc, 6) != 6) {
> + ret = -EIO;
> + goto out;
> + }
> +
> +out:
> + return ret;
> +}
> +
> void intel_psr_init_dpcd(struct intel_dp *intel_dp)
> {
> struct drm_i915_private *dev_priv =
> --
> 2.14.1
>
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