Oscar Mateo <oscar.ma...@intel.com> writes:
> This workarounds an issue with insufficient storage for the
> CL2 and SF units.
>
> v2: Renamed to Wa_1405766107
> v3: Wrapped the commit message
> v4: Rebased on top of the WA refactoring
> v5: Added References (Mika)
>
> References: HSDES#1405766107
> Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> Signed-off-by: Oscar Mateo <oscar.ma...@intel.com>
> ---
> drivers/gpu/drm/i915/i915_reg.h | 4 ++++
> drivers/gpu/drm/i915/intel_workarounds.c | 7 +++++++
> 2 files changed, 11 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 845c7e4..e8ab663 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8269,6 +8269,10 @@ enum {
> #define GEN11_HASH_CTRL_BIT0 (1 << 0)
> #define GEN11_HASH_CTRL_BIT4 (1 << 12)
>
> +#define GEN11_LSN_UNSLCVC _MMIO(0xB43C)
> +#define GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC (1 << 9)
s/MACALLOC/MAXALLOC
The bspec didn't know this reg (for icl) but
igt/gem_workarounds will surely tell if the write sticks.
Reviewed-by: Mika Kuoppala <mika.kuopp...@linux.intel.com>
> +#define GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC (1 << 7)
> +
> /* IVYBRIDGE DPF */
> #define GEN7_L3CDERRST1(slice) _MMIO(0xB008 + (slice) * 0x200)
> /* L3CD Error Status 1 */
> #define GEN7_L3CDERRST1_ROW_MASK (0x7ff<<14)
> diff --git a/drivers/gpu/drm/i915/intel_workarounds.c
> b/drivers/gpu/drm/i915/intel_workarounds.c
> index b0babe8..312846e 100644
> --- a/drivers/gpu/drm/i915/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/intel_workarounds.c
> @@ -726,6 +726,13 @@ static void icl_gt_workarounds_apply(struct
> drm_i915_private *dev_priv)
> */
> I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) |
> GEN11_LQSC_CLEAN_EVICT_DISABLE));
> +
> + /* Wa_1405766107:icl
> + * Formerly known as WaCL2SFHalfMaxAlloc
> + */
> + I915_WRITE(GEN11_LSN_UNSLCVC, (I915_READ(GEN11_LSN_UNSLCVC) |
> + GEN11_LSN_UNSLCVC_GAFS_HALF_SF_MAXALLOC |
> +
> GEN11_LSN_UNSLCVC_GAFS_HALF_CL2_MACALLOC));
> }
>
> void intel_gt_workarounds_apply(struct drm_i915_private *dev_priv)
> --
> 1.9.1
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