On 2018.07.27 12:36:46 -0700, Lucas De Marchi wrote: > The definition on i915_reg.h is going to change to depend on > dev_priv->gpio_mmio_base being properly initialized. Define our own > macros since init_generic_mmio_info() is called before than > gpio_mmio_base being set. >
Reviewed-by: Zhenyu Wang <zhen...@linux.intel.com> > Cc: intel-gvt-...@lists.freedesktop.org > Cc: Zhenyu Wang <zhen...@linux.intel.com> > Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com> > --- > drivers/gpu/drm/i915/gvt/handlers.c | 2 +- > drivers/gpu/drm/i915/gvt/reg.h | 2 ++ > 2 files changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gvt/handlers.c > b/drivers/gpu/drm/i915/gvt/handlers.c > index 7a58ca555197..0dc8692d7eb3 100644 > --- a/drivers/gpu/drm/i915/gvt/handlers.c > +++ b/drivers/gpu/drm/i915/gvt/handlers.c > @@ -2118,7 +2118,7 @@ static int init_generic_mmio_info(struct intel_gvt *gvt) > > MMIO_F(PCH_GMBUS0, 4 * 4, 0, 0, 0, D_ALL, gmbus_mmio_read, > gmbus_mmio_write); > - MMIO_F(PCH_GPIOA, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL); > + MMIO_F(PCH_GPIO_BASE, 6 * 4, F_UNALIGN, 0, 0, D_ALL, NULL, NULL); > MMIO_F(_MMIO(0xe4f00), 0x28, 0, 0, 0, D_ALL, NULL, NULL); > > MMIO_F(_MMIO(_PCH_DPB_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_PRE_SKL, NULL, > diff --git a/drivers/gpu/drm/i915/gvt/reg.h b/drivers/gpu/drm/i915/gvt/reg.h > index fd5fd25d0a0f..c9d6cf6cc623 100644 > --- a/drivers/gpu/drm/i915/gvt/reg.h > +++ b/drivers/gpu/drm/i915/gvt/reg.h > @@ -77,6 +77,8 @@ > #define _RING_CTL_BUF_SIZE(ctl) (((ctl) & RB_TAIL_SIZE_MASK) + \ > I915_GTT_PAGE_SIZE) > > +#define PCH_GPIO_BASE _MMIO(0xc5010) > + > #define PCH_GMBUS0 _MMIO(0xc5100) > #define PCH_GMBUS1 _MMIO(0xc5104) > #define PCH_GMBUS2 _MMIO(0xc5108) > -- > 2.17.1 > > _______________________________________________ > intel-gvt-dev mailing list > intel-gvt-...@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gvt-dev -- Open Source Technology Center, Intel ltd. $gpg --keyserver wwwkeys.pgp.net --recv-keys 4D781827
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