On 9/12/2018 12:24 AM, Jani Nikula wrote:
On Tue, 10 Jul 2018, Madhav Chauhan <madhav.chau...@intel.com> wrote:
This patch enables DDI buffer by writing to DDI_BUF_CTL
register and wait for DDI status to be *not idle* for a
port.
v2: Rebase
Signed-off-by: Madhav Chauhan <madhav.chau...@intel.com>
---
drivers/gpu/drm/i915/icl_dsi.c | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index dc16c1f..41faa19 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -251,6 +251,25 @@ static void gen11_dsi_voltage_swing_program_seq(struct
intel_encoder *encoder)
}
}
+static void gen11_dsi_enable_ddi_buffer(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct intel_dsi *intel_dsi = enc_to_intel_dsi(&encoder->base);
+ u32 tmp;
+ enum port port;
+
+ for_each_dsi_port(port, intel_dsi->ports) {
+ tmp = I915_READ(DDI_BUF_CTL(port));
+ tmp |= DDI_BUF_CTL_ENABLE;
+ I915_WRITE(DDI_BUF_CTL(port), tmp);
+
+ if (wait_for_us(!(I915_READ(DDI_BUF_CTL(port)) &
+ DDI_BUF_IS_IDLE),
+ 500))
IMO a "== 0" check reads better in wait_for_us.
+ DRM_ERROR("DDI port:%c buffer idle\n", port_name(port));
+ }
+}
+
static void gen11_dsi_enable_port_and_phy(struct intel_encoder *encoder)
{
/* step 4a: power up all lanes of the DDI used by DSI */
@@ -261,6 +280,9 @@ static void gen11_dsi_enable_port_and_phy(struct
intel_encoder *encoder)
/* step 4c: configure voltage swing and skew */
gen11_dsi_voltage_swing_program_seq(encoder);
+
+ /* step 4d: enable DDI buffer */
Alas, this is step 4e now, and you have a new 4d to take care of for
B0+.
Yes. Will remove step hardcoding comments from patch.
Regards,
Madhav
Regardless,
Reviewed-by: Jani Nikula <jani.nik...@intel.com>
+ gen11_dsi_enable_ddi_buffer(encoder);
}
static void __attribute__((unused))
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