Getting interrupt without any second level indications is unlikely. So there is no real advantage to bailout early as all the second level handlers can handle empty master control status.
Signed-off-by: Mika Kuoppala <mika.kuopp...@linux.intel.com> --- drivers/gpu/drm/i915/i915_irq.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 1e05ffe16816..27395a90bbef 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -3134,10 +3134,6 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, 0); master_ctl = raw_reg_read(regs, GEN11_GFX_MSTR_IRQ) & ~GEN11_MASTER_IRQ; - if (!master_ctl) { - raw_reg_write(regs, GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ); - return IRQ_NONE; - } /* Find, clear, then process each source of interrupt. */ gen11_gt_irq_handler(i915, master_ctl); @@ -3162,7 +3158,7 @@ static irqreturn_t gen11_irq_handler(int irq, void *arg) gen11_gu_misc_irq_handler(i915, master_ctl, gu_misc_iir); - return IRQ_HANDLED; + return master_ctl ? IRQ_HANDLED : IRQ_NONE; } static void i915_reset_device(struct drm_i915_private *dev_priv, -- 2.17.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx