The transition minimum is 14 blocks for gens 9 and 10, and 4 blocks
for gen 11. This minimum value is supposed to be added to the
configurable trans_amount. This matches both BSpec and additional
information provided by our HW engineers.
Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 910551e04d16..cab86690a0ba 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4878,8 +4878,8 @@ static void skl_compute_transition_wm(struct
intel_crtc_state *cstate,
if (!dev_priv->ipc_enabled)
goto exit;
- trans_min = 0;
- if (INTEL_GEN(dev_priv) >= 10)
+ trans_min = 14;
+ if (INTEL_GEN(dev_priv) >= 11)
trans_min = 4;
trans_offset_b = trans_min + trans_amount;
--
2.14.4
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