From: Clint Taylor <clinton.a.tay...@intel.com> Setting the SCDC scrambling CTS mode causes HDMI Link Layer protocol tests HF1-12 and HF1-13 to fail. Added "Source Shall" entries from SCDC section before enabling scrambling.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107895 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107896 Signed-off-by: Clint Taylor <clinton.a.tay...@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 6 +++--- drivers/gpu/drm/i915/intel_hdmi.c | 8 ++++++++ 2 files changed, 11 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c index 9e82281..a1b877f 100644 --- a/drivers/gpu/drm/i915/intel_ddi.c +++ b/drivers/gpu/drm/i915/intel_ddi.c @@ -1872,7 +1872,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state) temp |= TRANS_DDI_MODE_SELECT_DVI; if (crtc_state->hdmi_scrambling) - temp |= TRANS_DDI_HDMI_SCRAMBLING_MASK; + temp |= TRANS_DDI_HDMI_SCRAMBLING; if (crtc_state->hdmi_high_tmds_clock_ratio) temp |= TRANS_DDI_HIGH_TMDS_CHAR_RATE; } else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) { @@ -3394,8 +3394,8 @@ void intel_ddi_get_config(struct intel_encoder *encoder, if (intel_dig_port->infoframe_enabled(encoder, pipe_config)) pipe_config->has_infoframe = true; - if ((temp & TRANS_DDI_HDMI_SCRAMBLING_MASK) == - TRANS_DDI_HDMI_SCRAMBLING_MASK) + if ((temp & TRANS_DDI_HDMI_SCRAMBLING) == + TRANS_DDI_HDMI_SCRAMBLING) pipe_config->hdmi_scrambling = true; if (temp & TRANS_DDI_HIGH_TMDS_CHAR_RATE) pipe_config->hdmi_high_tmds_clock_ratio = true; diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 454f570..d181d67 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c @@ -2148,6 +2148,14 @@ bool intel_hdmi_handle_sink_scrambling(struct intel_encoder *encoder, connector->base.id, connector->name, yesno(scrambling), high_tmds_clock_ratio ? 40 : 10); + /* SCDC source version 10.4.1.2 */ + if (drm_scdc_writeb(adapter, SCDC_SOURCE_VERSION, 0x01) < 0) + DRM_DEBUG_KMS("Unable to set SCDC Source Version register\n"); + + /* Clear SCDC CONFIG_0 10.4.1.6 - RR_Enable Polling Only */ + if (drm_scdc_writeb(adapter, SCDC_CONFIG_0, 0x00) < 0) + DRM_DEBUG_KMS("Unable to set SCDC CONFIG_0 register\n"); + /* Set TMDS bit clock ratio to 1/40 or 1/10, and enable/disable scrambling */ return drm_scdc_set_high_tmds_clock_ratio(adapter, high_tmds_clock_ratio) && -- 1.9.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
