With the address range being specified for each platform, we can use
that instead of the .ppgtt enum to handle the differences between
3 level and 4 level PPGTT. In most cases, we really only care if the
platform supports PPGTT or not. Because of this, we can now remove
the HAS_FULL_PPGTT macro and the device info ppgtt field.
Aliasing PPGTT used by GEN 6 is a bit of an exception. For those cases,
it makes just as much sense to check if we're running on GEN 6 as it
does to check a device info flag.
v2: Reword the commit message to make it correct wrt aliasing ppgtt (Chris)
Signed-off-by: Bob Paauwe <bob.j.paa...@intel.com>
CC: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_drv.c | 7 ++++++-
drivers/gpu/drm/i915/i915_drv.h | 8 +++++---
drivers/gpu/drm/i915/i915_gem_context.c | 2 +-
drivers/gpu/drm/i915/i915_gem_gtt.c | 2 +-
drivers/gpu/drm/i915/i915_pci.c | 6 ------
drivers/gpu/drm/i915/intel_device_info.c | 2 +-
drivers/gpu/drm/i915/intel_device_info.h | 9 +--------
drivers/gpu/drm/i915/selftests/huge_pages.c | 4 ++--
drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 2 +-
drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 2 +-
10 files changed, 19 insertions(+), 25 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 393e89e2b309..eafb70407356 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -345,7 +345,12 @@ static int i915_getparam_ioctl(struct drm_device *dev,
void *data,
value = HAS_WT(dev_priv);
break;
case I915_PARAM_HAS_ALIASING_PPGTT:
- value = min_t(int, INTEL_PPGTT(dev_priv), I915_GEM_PPGTT_FULL);
+ if (INTEL_GEN(dev_priv) < 6)
+ value = I915_GEM_PPGTT_NONE;
+ else if (IS_GEN6(dev_priv))
+ value = I915_GEM_PPGTT_ALIASING;
+ else
+ value = I915_GEM_PPGTT_FULL;
break;
case I915_PARAM_HAS_SEMAPHORES:
value = HAS_LEGACY_SEMAPHORES(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 5b104dad75d8..3acdda232ea1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2582,11 +2582,13 @@ intel_info(const struct drm_i915_private *dev_priv)
#define HAS_EXECLISTS(dev_priv) HAS_LOGICAL_RING_CONTEXTS(dev_priv)
-#define INTEL_PPGTT(dev_priv) (INTEL_INFO(dev_priv)->ppgtt)
+#define INTEL_PPGTT_BITS(dev_priv) (INTEL_INFO(dev_priv)->ppgtt_bits)
#define HAS_PPGTT(dev_priv) \
- (INTEL_PPGTT(dev_priv) != INTEL_PPGTT_NONE)
+ (INTEL_PPGTT_BITS(dev_priv) != 0)
+/*
#define HAS_FULL_PPGTT(dev_priv) \
- (INTEL_PPGTT(dev_priv) >= INTEL_PPGTT_FULL)
+ (INTEL_PPGTT_BITS(dev_priv) >= 31)
+*/
#define HAS_PAGE_SIZES(dev_priv, sizes) ({ \
GEM_BUG_ON((sizes) == 0); \
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c
b/drivers/gpu/drm/i915/i915_gem_context.c
index 1853e82cebd5..7bab4754b20c 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -414,7 +414,7 @@ i915_gem_create_context(struct drm_i915_private *dev_priv,
if (IS_ERR(ctx))
return ctx;
- if (HAS_FULL_PPGTT(dev_priv)) {
+ if (INTEL_GEN(dev_priv) > 6) {
struct i915_hw_ppgtt *ppgtt;
ppgtt = i915_ppgtt_create(dev_priv, file_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index e818d3c00bba..1272f7d9e915 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -2861,7 +2861,7 @@ int i915_gem_init_ggtt(struct drm_i915_private *dev_priv)
/* And finally clear the reserved guard page */
ggtt->vm.clear_range(&ggtt->vm, ggtt->vm.total - PAGE_SIZE, PAGE_SIZE);
- if (INTEL_PPGTT(dev_priv) == INTEL_PPGTT_ALIASING) {
+ if (IS_GEN6(dev_priv)) {
ret = i915_gem_init_aliasing_ppgtt(dev_priv);
if (ret)
goto err;
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index fac4c69cb5db..76d3c96733b0 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -252,7 +252,6 @@ static const struct intel_device_info intel_ironlake_m_info
= {
.has_llc = 1, \
.has_rc6 = 1, \
.has_rc6p = 1, \
- .ppgtt = INTEL_PPGTT_ALIASING, \
.ppgtt_bits = 31, \
GEN_DEFAULT_PIPEOFFSETS, \
GEN_DEFAULT_PAGE_SIZES, \
@@ -298,7 +297,6 @@ static const struct intel_device_info
intel_sandybridge_m_gt2_info = {
.has_llc = 1, \
.has_rc6 = 1, \
.has_rc6p = 1, \
- .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 31, \
GEN_DEFAULT_PIPEOFFSETS, \
GEN_DEFAULT_PAGE_SIZES, \
@@ -352,7 +350,6 @@ static const struct intel_device_info intel_valleyview_info
= {
.has_rc6 = 1,
.has_gmch_display = 1,
.has_hotplug = 1,
- .ppgtt = INTEL_PPGTT_FULL,
.ppgtt_bits = 31,
.has_snoop = true,
.has_coherent_ggtt = false,
@@ -400,7 +397,6 @@ static const struct intel_device_info
intel_haswell_gt3_info = {
.page_sizes = I915_GTT_PAGE_SIZE_4K | \
I915_GTT_PAGE_SIZE_2M, \
.has_logical_ring_contexts = 1, \
- .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 48, \
.has_64bit_reloc = 1, \
.has_reset_engine = 1
@@ -445,7 +441,6 @@ static const struct intel_device_info intel_cherryview_info
= {
.has_rc6 = 1,
.has_logical_ring_contexts = 1,
.has_gmch_display = 1,
- .ppgtt = INTEL_PPGTT_FULL,
.ppgtt_bits = 32,
.has_reset_engine = 1,
.has_snoop = true,
@@ -522,7 +517,6 @@ static const struct intel_device_info
intel_skylake_gt4_info = {
.has_logical_ring_contexts = 1, \
.has_logical_ring_preemption = 1, \
.has_guc = 1, \
- .ppgtt = INTEL_PPGTT_FULL, \
.ppgtt_bits = 48, \
.has_reset_engine = 1, \
.has_snoop = true, \
diff --git a/drivers/gpu/drm/i915/intel_device_info.c
b/drivers/gpu/drm/i915/intel_device_info.c
index 3e873c2e0220..570fc4720b10 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -857,7 +857,7 @@ void intel_device_info_runtime_init(struct
intel_device_info *info)
if (IS_GEN6(dev_priv) && intel_vtd_active()) {
DRM_INFO("Disabling ppGTT for VT-d support\n");
- info->ppgtt = INTEL_PPGTT_NONE;
+ info->ppgtt_bits = 0;
}
/* Initialize command stream timestamp frequency */
diff --git a/drivers/gpu/drm/i915/intel_device_info.h
b/drivers/gpu/drm/i915/intel_device_info.h
index dc60be4b1435..a7f29cf098d9 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -76,12 +76,6 @@ enum intel_platform {
INTEL_MAX_PLATFORMS
};
-enum intel_ppgtt {
- INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
- INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
- INTEL_PPGTT_FULL = I915_GEM_PPGTT_FULL,
-};
-
#define DEV_INFO_FOR_EACH_FLAG(func) \
func(is_mobile); \
func(is_lp); \
@@ -159,7 +153,6 @@ struct intel_device_info {
enum intel_platform platform;
u32 platform_mask;
- enum intel_ppgtt ppgtt;
unsigned int page_sizes; /* page sizes supported by the HW */
u32 display_mmio_offset;
@@ -189,7 +182,7 @@ struct intel_device_info {
u16 gamma_lut_size;
} color;
- /* Full PPGTT address range size */
+ /* PPGTT address range size in number of bits */
int ppgtt_bits;
};
diff --git a/drivers/gpu/drm/i915/selftests/huge_pages.c
b/drivers/gpu/drm/i915/selftests/huge_pages.c
index 95abf8475464..11973452fed6 100644
--- a/drivers/gpu/drm/i915/selftests/huge_pages.c
+++ b/drivers/gpu/drm/i915/selftests/huge_pages.c
@@ -1696,8 +1696,8 @@ int i915_gem_huge_page_mock_selftests(void)
if (!dev_priv)
return -ENOMEM;
- /* Pretend to be a device which supports the 48b PPGTT */
- mkwrite_device_info(dev_priv)->ppgtt = INTEL_PPGTT_FULL;
+ /* Pretend to be a device which supports the 63b PPGTT */
+ mkwrite_device_info(dev_priv)->ppgtt_bits = 63;
pdev = dev_priv->drm.pdev;
dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(39));
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
index 4365979d8222..e63ee21c2317 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_evict.c
@@ -351,7 +351,7 @@ static int igt_evict_contexts(void *arg)
* where the GTT space of the request is separate from the GGTT
* allocation required to build the request.
*/
- if (!HAS_FULL_PPGTT(i915))
+ if (INTEL_GEN(i915) <= 6)
return 0;
mutex_lock(&i915->drm.struct_mutex);
diff --git a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
index 17b5aaaa7a50..af7309aee610 100644
--- a/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/selftests/i915_gem_gtt.c
@@ -1001,7 +1001,7 @@ static int exercise_ppgtt(struct drm_i915_private
*dev_priv,
IGT_TIMEOUT(end_time);
int err;
- if (!HAS_FULL_PPGTT(dev_priv))
+ if (INTEL_GEN(dev_priv) <= 6)
return 0;
file = mock_file(dev_priv);
--
2.17.1
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