Use the same method to get port clock
like other encoders.

Signed-off-by: Vandita Kulkarni <vandita.kulka...@intel.com>
---
 drivers/gpu/drm/i915/icl_dsi.c   | 10 ++++++++--
 drivers/gpu/drm/i915/intel_ddi.c |  2 +-
 drivers/gpu/drm/i915/intel_dsi.h |  4 ++++
 3 files changed, 13 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/icl_dsi.c b/drivers/gpu/drm/i915/icl_dsi.c
index 8590825..ec22b2e 100644
--- a/drivers/gpu/drm/i915/icl_dsi.c
+++ b/drivers/gpu/drm/i915/icl_dsi.c
@@ -1105,12 +1105,18 @@ static void gen11_dsi_get_config(struct intel_encoder 
*encoder,
 {
        struct intel_dsi *intel_dsi = container_of(encoder, struct intel_dsi,
                                                   base);
+       struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+       int link_clock = 0;
+       uint32_t pll_id;
        u32 pixel_clk;
 
-       //FIXME: Calculate pixel clock using PLL functions once implemented.
+       pll_id = intel_get_shared_dpll_id(dev_priv, pipe_config->shared_dpll);
+       link_clock = cnl_calc_wrpll_link(dev_priv, pll_id);
+       pipe_config->port_clock = link_clock;
+
        pixel_clk = intel_dsi->pclk;
        pipe_config->base.adjusted_mode.crtc_clock = pixel_clk;
-       pipe_config->port_clock = pixel_clk;
+       pipe_config->output_types |= BIT(INTEL_OUTPUT_DSI);
 }
 
 static bool gen11_dsi_compute_config(struct intel_encoder *encoder,
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index ad11540..3783f79 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1363,7 +1363,7 @@ static int skl_calc_wrpll_link(struct drm_i915_private 
*dev_priv,
        return dco_freq / (p0 * p1 * p2 * 5);
 }
 
-static int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv,
+int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv,
                               enum intel_dpll_id pll_id)
 {
        uint32_t cfgcr0, cfgcr1;
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h
index ee93137..80805bf 100644
--- a/drivers/gpu/drm/i915/intel_dsi.h
+++ b/drivers/gpu/drm/i915/intel_dsi.h
@@ -189,4 +189,8 @@ void intel_dsi_vbt_exec_sequence(struct intel_dsi 
*intel_dsi,
                                 enum mipi_seq seq_id);
 void intel_dsi_msleep(struct intel_dsi *intel_dsi, int msec);
 
+/* icl dsi uses combophy pll which can be used by any ddi */
+int cnl_calc_wrpll_link(struct drm_i915_private *dev_priv,
+                       enum intel_dpll_id pll_id);
+
 #endif /* _INTEL_DSI_H */
-- 
1.9.1

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