On 09/05/2019 11:51, Kahola, Mika wrote:
On Wed, 2019-04-10 at 13:11 +0100, Tvrtko Ursulin wrote:
On 10/04/2019 12:48, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2019-04-10 12:43:22)
@@ -754,8 +768,8 @@ static void test_flip(int i915, int vgem,
unsigned hang)
uint32_t offsets[4] = {};
int fd;
- bo[i].width = 1024;
- bo[i].height = 768;
+ bo[i].width = mode->hdisplay;
+ bo[i].height = mode->vdisplay;
bo[i].bpp = 32;
vgem_create(vgem, &bo[i]);
That may not result in a buffer that we are able to flip to. :|
width = ALIGN(hdisplay, 16); vdisplay should be ok.
Oh.. well I don't know. Maarten helpfully described in the BZ that
the
skip is due BO being too small for the FB. Aligning width would then
make it too large. Is that OK? Who assigned this display related IGT
bug
to me anyway? :))
I don't know about that. I have a task to improve the test in my
backlog too :)
This patch definitely improves the test. However, I wasn't able to
apply the patch cleanly on my tree. Maybe it needs a rebase? Anyway, CI
seems to be happy with the change.
Reviewed-by: Mika Kahola <mika.kah...@intel.com>
Thanks, pushed!
One less thing on your todo list now. :)
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
