On 04/06/19 09:29, Chris Wilson wrote:
I told vecs0 to use vecs1 registers...
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
tests/i915/gem_ctx_shared.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/tests/i915/gem_ctx_shared.c b/tests/i915/gem_ctx_shared.c
index 67ecd0953..069964546 100644
--- a/tests/i915/gem_ctx_shared.c
+++ b/tests/i915/gem_ctx_shared.c
@@ -544,9 +544,11 @@ static void independent(int i915, unsigned ring, unsigned
flags)
mmio_base = 0x22000;
break;
+#define GEN11_VECS0_BASE 0x1c8000
+#define GEN11_VECS1_BASE 0x1d8000
VECS1 coming next?
case I915_EXEC_VEBOX:
There is a commented-out case for BSD, why is that?
if (intel_gen(intel_get_drm_devid(i915)) >= 11)
- mmio_base = 0x1d8000;
+ mmio_base = GEN11_VECS0_BASE;
Might as well define all bases.
Still, fixes the test so:
Reviewed-by: Antonio Argenziano <antonio.argenzi...@intel.com>
Antonio
else
mmio_base = 0x1a000;
break;
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