From: John Harrison <john.c.harri...@intel.com> Recent hardware adds support for finer-grained control over whitelisting, allowing registers to be whitelisted independently for reads and/or writes. This series will add the basic plumbing to support that.
John Harrison (3): drm/i915: Support flags in whitlist WAs drm/i915: Support whitelist workarounds on all engines drm/i915: Add whitelist workarounds for ICL Robert M. Fosha (1): drm/i915: Update workarounds selftest for read only regs drivers/gpu/drm/i915/gt/intel_workarounds.c | 105 +++++++++++++----- .../gpu/drm/i915/gt/selftest_workarounds.c | 43 ++++++- drivers/gpu/drm/i915/i915_reg.h | 7 ++ 3 files changed, 124 insertions(+), 31 deletions(-) -- 2.21.0.5.gaeb582a983 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
