On Tue, Apr 02, 2013 at 10:28:11AM -0700, Jesse Barnes wrote:
> As Imre pointed out, this will do the wrong thing.
> 
> Reported-by: Imre Deak <imre.d...@intel.com>
> Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>

We don't actually support anything w/ bpp%8!=0, so either works.
Actually, for something like bpp=4, the original code might even be
more correct. But I don't really want to think about <8bpp stuff,
so I won't object to the patch.

> ---
>  drivers/gpu/drm/i915/intel_drv.h |    2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 37f4bb3..18f0547 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -137,7 +137,7 @@ struct intel_framebuffer {
>  inline static u32
>  intel_framebuffer_pitch_for_width(int width, int bpp)
>  {
> -     u32 pitch = DIV_ROUND_UP(width * bpp, 8);
> +     u32 pitch = width * DIV_ROUND_UP(bpp, 8);
>       return ALIGN(pitch, 64);
>  }
>  
> -- 
> 1.7.9.5
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Ville Syrjälä
Intel OTC
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