== Series Details == Series: series starting with [v6,1/4] drm/i915/bdw+: Move misc display IRQ handling to it own function URL : https://patchwork.freedesktop.org/series/62416/ State : warning
== Summary == $ dim checkpatch origin/drm-tip 2622a5f202e3 drm/i915/bdw+: Move misc display IRQ handling to it own function 1ecf05a786ab drm/i915: Add _TRANS2() -:31: WARNING:LONG_LINE: line over 100 characters #31: FILE: drivers/gpu/drm/i915/i915_reg.h:254: + INTEL_INFO(dev_priv)->trans_offsets[TRANSCODER_A] + (reg) + \ total: 0 errors, 1 warnings, 0 checks, 13 lines checked 52333122c0fb drm/i915/psr: Make PSR registers relative to transcoders -:375: WARNING:LONG_LINE: line over 100 characters #375: FILE: drivers/gpu/drm/i915/i915_reg.h:4238: +#define _PSR_ADJ(tran, reg) (IS_HASWELL(dev_priv) ? _HSW_PSR_ADJ(reg) : _TRANS2(tran, reg)) -:375: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'reg' - possible side-effects? #375: FILE: drivers/gpu/drm/i915/i915_reg.h:4238: +#define _PSR_ADJ(tran, reg) (IS_HASWELL(dev_priv) ? _HSW_PSR_ADJ(reg) : _TRANS2(tran, reg)) -:397: WARNING:LONG_LINE_COMMENT: line over 100 characters #397: FILE: drivers/gpu/drm/i915/i915_reg.h:4287: +#define EDP_PSR_AUX_DATA(tran, i) _MMIO(_PSR_ADJ(tran, _SRD_AUX_DATA_A) + (i) + 4) /* 5 registers */ total: 0 errors, 2 warnings, 1 checks, 366 lines checked 413c4f5206bb drm/i915: Add transcoder restriction to PSR2 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
