On Wed, Apr 17, 2013 at 08:11:58PM +0300, [email protected] wrote: > From: Ville Syrjälä <[email protected]> > > The docs say that the trickle feed disable bit is present (for primary > planes only, not video sprites) on BLC and CTG, and that it must be set > for ELK. Just set it for all g4x chipset. > > Signed-off-by: Ville Syrjälä <[email protected]>
I'm stunned that we did all the post-pch chipsets but missed g4x. Perhaps we should also do it during init_clock_gating() as we do for other generations? -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
