We can't read the pfit regs if the power well is off, so use the cached
value.
However, I think this check is incorrect (it was taken from an earlier
check against dev_priv). We should probably just drop it altogether,
since the panel fitter isn't useful without a pipe to fetch from and
an encoder to feed.
Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>
---
drivers/gpu/drm/i915/intel_display.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index 6504337..c451940 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -5917,8 +5917,7 @@ static void haswell_modeset_global_resources(struct
drm_device *dev)
/* XXX: Should check for edp transcoder here, but thanks to init
* sequence that's not yet available. Just in case desktop eDP
* on PORT D is possible on haswell, too. */
- /* Even the eDP panel fitter is outside the always-on well. */
- if (I915_READ(PF_WIN_SZ(crtc->pipe)))
+ if (crtc->config.pch_pfit.size)
enable = true;
}
--
1.7.10.4
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