This is possible thanks to moving the m/n stuff into pipe_config.

Unfortunately we need to move them a bit to avoid forward
declarations.

Reviewed-by: Paulo Zanoni <paulo.r.zan...@intel.com>
Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
---
 drivers/gpu/drm/i915/intel_display.c | 68 ++++++++++++++++++------------------
 drivers/gpu/drm/i915/intel_drv.h     |  4 ---
 2 files changed, 34 insertions(+), 38 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 9c85270..3dd1059 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4392,6 +4392,40 @@ static void vlv_pllb_recal_opamp(struct drm_i915_private 
*dev_priv)
        intel_dpio_write(dev_priv, DPIO_CALIBRATION, reg_val);
 }
 
+static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
+                                        struct intel_link_m_n *m_n)
+{
+       struct drm_device *dev = crtc->base.dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       int pipe = crtc->pipe;
+
+       I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
+       I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
+       I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
+       I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
+}
+
+static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
+                                        struct intel_link_m_n *m_n)
+{
+       struct drm_device *dev = crtc->base.dev;
+       struct drm_i915_private *dev_priv = dev->dev_private;
+       int pipe = crtc->pipe;
+       enum transcoder transcoder = crtc->config.cpu_transcoder;
+
+       if (INTEL_INFO(dev)->gen >= 5) {
+               I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | 
m_n->gmch_m);
+               I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
+               I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
+               I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
+       } else {
+               I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | 
m_n->gmch_m);
+               I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
+               I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
+               I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
+       }
+}
+
 static void intel_dp_set_m_n(struct intel_crtc *crtc)
 {
        if (crtc->config.has_pch_encoder)
@@ -5611,40 +5645,6 @@ int ironlake_get_lanes_required(int target_clock, int 
link_bw, int bpp)
        return bps / (link_bw * 8) + 1;
 }
 
-void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-                                 struct intel_link_m_n *m_n)
-{
-       struct drm_device *dev = crtc->base.dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
-       int pipe = crtc->pipe;
-
-       I915_WRITE(TRANSDATA_M1(pipe), TU_SIZE(m_n->tu) | m_n->gmch_m);
-       I915_WRITE(TRANSDATA_N1(pipe), m_n->gmch_n);
-       I915_WRITE(TRANSDPLINK_M1(pipe), m_n->link_m);
-       I915_WRITE(TRANSDPLINK_N1(pipe), m_n->link_n);
-}
-
-void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
-                                 struct intel_link_m_n *m_n)
-{
-       struct drm_device *dev = crtc->base.dev;
-       struct drm_i915_private *dev_priv = dev->dev_private;
-       int pipe = crtc->pipe;
-       enum transcoder transcoder = crtc->config.cpu_transcoder;
-
-       if (INTEL_INFO(dev)->gen >= 5) {
-               I915_WRITE(PIPE_DATA_M1(transcoder), TU_SIZE(m_n->tu) | 
m_n->gmch_m);
-               I915_WRITE(PIPE_DATA_N1(transcoder), m_n->gmch_n);
-               I915_WRITE(PIPE_LINK_M1(transcoder), m_n->link_m);
-               I915_WRITE(PIPE_LINK_N1(transcoder), m_n->link_n);
-       } else {
-               I915_WRITE(PIPE_GMCH_DATA_M(pipe), TU_SIZE(m_n->tu) | 
m_n->gmch_m);
-               I915_WRITE(PIPE_GMCH_DATA_N(pipe), m_n->gmch_n);
-               I915_WRITE(PIPE_DP_LINK_M(pipe), m_n->link_m);
-               I915_WRITE(PIPE_DP_LINK_N(pipe), m_n->link_n);
-       }
-}
-
 static bool ironlake_needs_fb_cb_tune(struct dpll *dpll, int factor)
 {
        return i9xx_dpll_compute_m(dpll) < factor * dpll->n;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index dfcf546..88890a3 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -719,10 +719,6 @@ extern void intel_init_clock_gating(struct drm_device 
*dev);
 extern void intel_write_eld(struct drm_encoder *encoder,
                            struct drm_display_mode *mode);
 extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe);
-extern void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
-                                        struct intel_link_m_n *m_n);
-extern void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc,
-                                        struct intel_link_m_n *m_n);
 extern void intel_prepare_ddi(struct drm_device *dev);
 extern void hsw_fdi_link_train(struct drm_crtc *crtc);
 extern void intel_ddi_init(struct drm_device *dev, enum port port);
-- 
1.8.1.4

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