Hi Chris, Thank you for the patch! Yet something to improve:
[auto build test ERROR on drm-intel/for-linux-next] [cannot apply to v5.4-rc1 next-20191001] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system. BTW, we also suggest to use '--base' option to specify the base tree in git format-patch, please see https://stackoverflow.com/a/37406982] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-Use-a-modparam-to-restrict-exposed-engines/20191002-003226 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-a002-201939 (attached as .config) compiler: gcc-5 (Ubuntu 5.5.0-12ubuntu1) 5.5.0 20171010 reproduce: # save the attached .config to linux build tree make ARCH=i386 If you fix the issue, kindly add following tag Reported-by: kbuild test robot <l...@intel.com> All errors (new ones prefixed by >>): drivers/gpu/drm/i915/i915_gem.c: In function 'i915_gem_init': >> drivers/gpu/drm/i915/i915_gem.c:1411:3: error: implicit declaration of >> function 'intel_gt_set_wedged_on_init' >> [-Werror=implicit-function-declaration] intel_gt_set_wedged_on_init(&dev_priv->gt); ^ cc1: some warnings being treated as errors vim +/intel_gt_set_wedged_on_init +1411 drivers/gpu/drm/i915/i915_gem.c 1405 1406 int i915_gem_init(struct drm_i915_private *dev_priv) 1407 { 1408 int ret; 1409 1410 if (!RUNTIME_INFO(dev_priv)->num_engines) { > 1411 intel_gt_set_wedged_on_init(&dev_priv->gt); 1412 return 0; 1413 } 1414 1415 /* We need to fallback to 4K pages if host doesn't support huge gtt. */ 1416 if (intel_vgpu_active(dev_priv) && !intel_vgpu_has_huge_gtt(dev_priv)) 1417 mkwrite_device_info(dev_priv)->page_sizes = 1418 I915_GTT_PAGE_SIZE_4K; 1419 1420 intel_timelines_init(dev_priv); 1421 1422 ret = i915_gem_init_userptr(dev_priv); 1423 if (ret) 1424 return ret; 1425 1426 intel_uc_fetch_firmwares(&dev_priv->gt.uc); 1427 intel_wopcm_init(&dev_priv->wopcm); 1428 1429 /* This is just a security blanket to placate dragons. 1430 * On some systems, we very sporadically observe that the first TLBs 1431 * used by the CS may be stale, despite us poking the TLB reset. If 1432 * we hold the forcewake during initialisation these problems 1433 * just magically go away. 1434 */ 1435 mutex_lock(&dev_priv->drm.struct_mutex); 1436 intel_uncore_forcewake_get(&dev_priv->uncore, FORCEWAKE_ALL); 1437 1438 ret = i915_init_ggtt(dev_priv); 1439 if (ret) { 1440 GEM_BUG_ON(ret == -EIO); 1441 goto err_unlock; 1442 } 1443 1444 ret = i915_gem_init_scratch(dev_priv, 1445 IS_GEN(dev_priv, 2) ? SZ_256K : PAGE_SIZE); 1446 if (ret) { 1447 GEM_BUG_ON(ret == -EIO); 1448 goto err_ggtt; 1449 } 1450 1451 ret = intel_engines_setup(dev_priv); 1452 if (ret) { 1453 GEM_BUG_ON(ret == -EIO); 1454 goto err_unlock; 1455 } 1456 1457 ret = i915_gem_contexts_init(dev_priv); 1458 if (ret) { 1459 GEM_BUG_ON(ret == -EIO); 1460 goto err_scratch; 1461 } 1462 1463 ret = intel_engines_init(dev_priv); 1464 if (ret) { 1465 GEM_BUG_ON(ret == -EIO); 1466 goto err_context; 1467 } 1468 1469 intel_init_gt_powersave(dev_priv); 1470 1471 intel_uc_init(&dev_priv->gt.uc); 1472 1473 ret = i915_gem_init_hw(dev_priv); 1474 if (ret) 1475 goto err_uc_init; 1476 1477 /* Only when the HW is re-initialised, can we replay the requests */ 1478 ret = intel_gt_resume(&dev_priv->gt); 1479 if (ret) 1480 goto err_init_hw; 1481 1482 /* 1483 * Despite its name intel_init_clock_gating applies both display 1484 * clock gating workarounds; GT mmio workarounds and the occasional 1485 * GT power context workaround. Worse, sometimes it includes a context 1486 * register workaround which we need to apply before we record the 1487 * default HW state for all contexts. 1488 * 1489 * FIXME: break up the workarounds and apply them at the right time! 1490 */ 1491 intel_init_clock_gating(dev_priv); 1492 1493 ret = intel_engines_verify_workarounds(dev_priv); 1494 if (ret) 1495 goto err_gt; 1496 1497 ret = __intel_engines_record_defaults(dev_priv); 1498 if (ret) 1499 goto err_gt; 1500 1501 ret = i915_inject_load_error(dev_priv, -ENODEV); 1502 if (ret) 1503 goto err_gt; 1504 1505 ret = i915_inject_load_error(dev_priv, -EIO); 1506 if (ret) 1507 goto err_gt; 1508 1509 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); 1510 mutex_unlock(&dev_priv->drm.struct_mutex); 1511 1512 return 0; 1513 1514 /* 1515 * Unwinding is complicated by that we want to handle -EIO to mean 1516 * disable GPU submission but keep KMS alive. We want to mark the 1517 * HW as irrevisibly wedged, but keep enough state around that the 1518 * driver doesn't explode during runtime. 1519 */ 1520 err_gt: 1521 mutex_unlock(&dev_priv->drm.struct_mutex); 1522 1523 intel_gt_set_wedged(&dev_priv->gt); 1524 i915_gem_suspend(dev_priv); 1525 i915_gem_suspend_late(dev_priv); 1526 1527 i915_gem_drain_workqueue(dev_priv); 1528 1529 mutex_lock(&dev_priv->drm.struct_mutex); 1530 err_init_hw: 1531 intel_uc_fini_hw(&dev_priv->gt.uc); 1532 err_uc_init: 1533 if (ret != -EIO) { 1534 intel_uc_fini(&dev_priv->gt.uc); 1535 intel_cleanup_gt_powersave(dev_priv); 1536 intel_engines_cleanup(dev_priv); 1537 } 1538 err_context: 1539 if (ret != -EIO) 1540 i915_gem_contexts_fini(dev_priv); 1541 err_scratch: 1542 i915_gem_fini_scratch(dev_priv); 1543 err_ggtt: 1544 err_unlock: 1545 intel_uncore_forcewake_put(&dev_priv->uncore, FORCEWAKE_ALL); 1546 mutex_unlock(&dev_priv->drm.struct_mutex); 1547 1548 if (ret != -EIO) { 1549 intel_uc_cleanup_firmwares(&dev_priv->gt.uc); 1550 i915_gem_cleanup_userptr(dev_priv); 1551 intel_timelines_fini(dev_priv); 1552 } 1553 1554 if (ret == -EIO) { 1555 mutex_lock(&dev_priv->drm.struct_mutex); 1556 1557 /* 1558 * Allow engines or uC initialisation to fail by marking the GPU 1559 * as wedged. But we only want to do this when the GPU is angry, 1560 * for all other failure, such as an allocation failure, bail. 1561 */ 1562 if (!intel_gt_is_wedged(&dev_priv->gt)) { 1563 i915_probe_error(dev_priv, 1564 "Failed to initialize GPU, declaring it wedged!\n"); 1565 intel_gt_set_wedged(&dev_priv->gt); 1566 } 1567 1568 /* Minimal basic recovery for KMS */ 1569 ret = i915_ggtt_enable_hw(dev_priv); 1570 i915_gem_restore_gtt_mappings(dev_priv); 1571 i915_gem_restore_fences(dev_priv); 1572 intel_init_clock_gating(dev_priv); 1573 1574 mutex_unlock(&dev_priv->drm.struct_mutex); 1575 } 1576 1577 i915_gem_drain_freed_objects(dev_priv); 1578 return ret; 1579 } 1580 --- 0-DAY kernel test infrastructure Open Source Technology Center https://lists.01.org/pipermail/kbuild-all Intel Corporation
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