[Intel-gfx] [PATCH 4/7] drm/i915: Expose C8 on VLV/CHV sprite planes

[Ville Syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

VLV/CHV sprite planes also support the C8 format. Let's expose that.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Reviewed-by: Uma Shankar <uma.shan...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 6 ++++++
 drivers/gpu/drm/i915/i915_reg.h             | 1 +
 2 files changed, 7 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c 
b/drivers/gpu/drm/i915/display/intel_sprite.c
index 150ad367cf9e..5b329ced63eb 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -972,6 +972,9 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state 
*crtc_state,
        case DRM_FORMAT_VYUY:
                sprctl |= SP_FORMAT_YUV422 | SP_YUV_ORDER_VYUY;
                break;
+       case DRM_FORMAT_C8:
+               sprctl |= SP_FORMAT_8BPP;
+               break;
        case DRM_FORMAT_RGB565:
                sprctl |= SP_FORMAT_BGR565;
                break;
@@ -2404,6 +2407,7 @@ static const u32 snb_plane_formats[] = {
 };
 
 static const u32 vlv_plane_formats[] = {
+       DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_ABGR8888,
        DRM_FORMAT_ARGB8888,
@@ -2418,6 +2422,7 @@ static const u32 vlv_plane_formats[] = {
 };
 
 static const u32 chv_pipe_b_sprite_formats[] = {
+       DRM_FORMAT_C8,
        DRM_FORMAT_RGB565,
        DRM_FORMAT_XRGB8888,
        DRM_FORMAT_XBGR8888,
@@ -2658,6 +2663,7 @@ static bool vlv_sprite_format_mod_supported(struct 
drm_plane *_plane,
        }
 
        switch (format) {
+       case DRM_FORMAT_C8:
        case DRM_FORMAT_RGB565:
        case DRM_FORMAT_ABGR8888:
        case DRM_FORMAT_ARGB8888:
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 78dfdcfc724a..a607ea520829 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -6629,6 +6629,7 @@ enum {
 #define   SP_GAMMA_ENABLE              (1 << 30)
 #define   SP_PIXFORMAT_MASK            (0xf << 26)
 #define   SP_FORMAT_YUV422             (0x0 << 26)
+#define   SP_FORMAT_8BPP               (0x2 << 26)
 #define   SP_FORMAT_BGR565             (0x5 << 26)
 #define   SP_FORMAT_BGRX8888           (0x6 << 26)
 #define   SP_FORMAT_BGRA8888           (0x7 << 26)
-- 
2.23.0

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