Disable VS Unit Clockgating.
BSpec: 52857
Cc: Mika Kuoppala <mika.kuopp...@linux.intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.srip...@intel.com>
---
drivers/gpu/drm/i915/i915_reg.h | 1 +
drivers/gpu/drm/i915/intel_pm.c | 4 ++++
2 files changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 2ffcc21670b7..3714eb641124 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -4172,6 +4172,7 @@ enum {
#define UNSLICE_UNIT_LEVEL_CLKGATE _MMIO(0x9434)
#define VFUNIT_CLKGATE_DIS (1 << 20)
+#define VSUNIT_CLKGATE_DIS (1 << 3)
#define INF_UNIT_LEVEL_CLKGATE _MMIO(0x9560)
#define CGPSF_CLKGATE_DIS (1 << 3)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 2d389e437e87..fe32c0433971 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6572,6 +6572,10 @@ static void tgl_init_clock_gating(struct
drm_i915_private *dev_priv)
I915_WRITE(POWERGATE_ENABLE,
I915_READ(POWERGATE_ENABLE) | vd_pg_enable);
+
+ /* Wa_1408615072:tgl */
+ I915_WRITE(UNSLICE_UNIT_LEVEL_CLKGATE,
+ I915_READ(UNSLICE_UNIT_LEVEL_CLKGATE) | VFUNIT_CLKGATE_DIS);
}
static void cnp_init_clock_gating(struct drm_i915_private *dev_priv)
--
2.20.1
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