On future hardware with missing GGTT BAR we won't be able to exercise
dma-buf access via that path. However, access to the dma sg list
feature exposed by dma-buf can still be tested through blitter.
Unfortunately we don't have any equivalently simple tests that use
blitter. Provide them.
Suggested-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Signed-off-by: Janusz Krzysztofik <janusz.krzyszto...@linux.intel.com>
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
---
According to Trybot, these subtests are failing on Sandybridge (Gen6)
and Haswell (G75), can you please advice how those platforms should be
handled?
Thanks,
Janusz
tests/prime_vgem.c | 189 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 189 insertions(+)
diff --git a/tests/prime_vgem.c b/tests/prime_vgem.c
index 69ae8c9b..7b7bf1b0 100644
--- a/tests/prime_vgem.c
+++ b/tests/prime_vgem.c
@@ -23,6 +23,7 @@
#include "igt.h"
#include "igt_vgem.h"
+#include "intel_batchbuffer.h"
#include <sys/ioctl.h>
#include <sys/poll.h>
@@ -171,6 +172,77 @@ static void test_fence_mmap(int i915, int vgem)
close(slave[1]);
}
+static void test_fence_blt(int i915, int vgem)
+{
+ struct vgem_bo scratch;
+ uint32_t prime;
+ uint32_t *ptr;
+ uint32_t fence;
+ int dmabuf, i;
+ int master[2], slave[2];
+
+ igt_assert(pipe(master) == 0);
+ igt_assert(pipe(slave) == 0);
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ dmabuf = prime_handle_to_fd(vgem, scratch.handle);
+ prime = prime_fd_to_handle(i915, dmabuf);
+ close(dmabuf);
+
+ igt_fork(child, 1) {
+ uint32_t native;
+
+ close(master[0]);
+ close(slave[1]);
+
+ native = gem_create(i915, scratch.size);
+
+ ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ);
+ for (i = 0; i < 1024; i++)
+ igt_assert_eq(ptr[1024 * i], 0);
+
+ write(master[1], &child, sizeof(child));
+ read(slave[0], &child, sizeof(child));
+
+ igt_blitter_fast_copy__raw(i915, prime, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0,
+ scratch.width, scratch.height,
+ scratch.bpp, native, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0);
+ gem_sync(i915, native);
+
+ for (i = 0; i < 1024; i++)
+ igt_assert_eq(ptr[1024 * i], i);
+
+ munmap(ptr, scratch.size);
+ gem_close(i915, native);
+ gem_close(i915, prime);
+ }
+
+ close(master[1]);
+ close(slave[0]);
+ read(master[0], &i, sizeof(i));
+ fence = vgem_fence_attach(vgem, &scratch, VGEM_FENCE_WRITE);
+ write(slave[1], &i, sizeof(i));
+
+ ptr = vgem_mmap(vgem, &scratch, PROT_WRITE);
+ for (i = 0; i < 1024; i++)
+ ptr[1024 * i] = i;
+ munmap(ptr, scratch.size);
+ vgem_fence_signal(vgem, fence);
+ gem_close(vgem, scratch.handle);
+
+ igt_waitchildren();
+ close(master[0]);
+ close(slave[1]);
+}
+
static void test_write(int vgem, int i915)
{
struct vgem_bo scratch;
@@ -236,6 +308,62 @@ static void test_gtt(int vgem, int i915)
gem_close(vgem, scratch.handle);
}
+static void test_blt(int vgem, int i915)
+{
+ struct vgem_bo scratch;
+ uint32_t prime, native;
+ uint32_t *ptr;
+ int dmabuf, i;
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ dmabuf = prime_handle_to_fd(vgem, scratch.handle);
+ prime = prime_fd_to_handle(i915, dmabuf);
+ close(dmabuf);
+
+ native = gem_create(i915, scratch.size);
+
+ ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE);
+ for (i = 0; i < 1024; i++)
+ ptr[1024 * i] = i;
+ munmap(ptr, scratch.size);
+
+ igt_blitter_fast_copy__raw(i915,
+ native, 0, scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0,
+ scratch.width, scratch.height, scratch.bpp,
+ prime, 0, scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0);
+ gem_sync(i915, prime);
+
+ ptr = vgem_mmap(vgem, &scratch, PROT_READ | PROT_WRITE);
+ for (i = 0; i < 1024; i++) {
+ igt_assert_eq(ptr[1024 * i], i);
+ ptr[1024 * i] = ~i;
+ }
+ munmap(ptr, scratch.size);
+
+ igt_blitter_fast_copy__raw(i915,
+ prime, 0, scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0,
+ scratch.width, scratch.height, scratch.bpp,
+ native, 0, scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, 0);
+ gem_sync(i915, native);
+
+ ptr = gem_mmap__wc(i915, native, 0, scratch.size, PROT_READ);
+ for (i = 0; i < 1024; i++)
+ igt_assert_eq(ptr[1024 * i], ~i);
+ munmap(ptr, scratch.size);
+
+ gem_close(i915, native);
+ gem_close(i915, prime);
+ gem_close(vgem, scratch.handle);
+}
+
static void test_shrink(int vgem, int i915)
{
struct vgem_bo scratch = {
@@ -319,6 +447,59 @@ static void test_gtt_interleaved(int vgem, int i915)
gem_close(vgem, scratch.handle);
}
+static void test_blt_interleaved(int vgem, int i915)
+{
+ struct vgem_bo scratch;
+ uint32_t prime, native;
+ uint32_t *foreign, *local;
+ int dmabuf, i;
+
+ scratch.width = 1024;
+ scratch.height = 1024;
+ scratch.bpp = 32;
+ vgem_create(vgem, &scratch);
+
+ dmabuf = prime_handle_to_fd(vgem, scratch.handle);
+ prime = prime_fd_to_handle(i915, dmabuf);
+ close(dmabuf);
+
+ native = gem_create(i915, scratch.size);
+
+ foreign = vgem_mmap(vgem, &scratch, PROT_WRITE);
+ local = gem_mmap__wc(i915, native, 0, scratch.size, PROT_WRITE);
+
+ for (i = 0; i < 1024; i++) {
+ local[1024 * i] = i;
+ igt_blitter_fast_copy__raw(i915, native, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, i,
+ scratch.width, 1, scratch.bpp,
+ prime, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, i);
+ gem_sync(i915, prime);
+ igt_assert_eq(foreign[1024 * i], i);
+
+ foreign[1024 * i] = ~i;
+ igt_blitter_fast_copy__raw(i915, prime, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, i,
+ scratch.width, 1, scratch.bpp,
+ native, 0,
+ scratch.width * scratch.bpp / 8,
+ I915_TILING_NONE, 0, i);
+ gem_sync(i915, native);
+ igt_assert_eq(local[1024 * i], ~i);
+ }
+
+ munmap(local, scratch.size);
+ munmap(foreign, scratch.size);
+
+ gem_close(i915, native);
+ gem_close(i915, prime);
+ gem_close(vgem, scratch.handle);
+}
+
static bool prime_busy(int fd, bool excl)
{
struct pollfd pfd = { .fd = fd, .events = excl ? POLLOUT : POLLIN };
@@ -834,12 +1015,18 @@ igt_main
igt_subtest("basic-gtt")
test_gtt(vgem, i915);
+ igt_subtest("basic-blt")
+ test_blt(vgem, i915);
+
igt_subtest("shrink")
test_shrink(vgem, i915);
igt_subtest("coherency-gtt")
test_gtt_interleaved(vgem, i915);
+ igt_subtest("coherency-blt")
+ test_blt_interleaved(vgem, i915);
+
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_f("%ssync-%s",
e->exec_id == 0 ? "basic-" : "",
@@ -886,6 +1073,8 @@ igt_main
test_fence_read(i915, vgem);
igt_subtest("basic-fence-mmap")
test_fence_mmap(i915, vgem);
+ igt_subtest("basic-fence-blt")
+ test_fence_blt(i915, vgem);
for (e = intel_execution_engines; e->name; e++) {
igt_subtest_f("%sfence-wait-%s",
--
2.21.0
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