On Fri, Mar 20, 2020 at 04:36:27PM +0200, Jani Nikula wrote:
> Convert all the DRM_* logging macros to the struct drm_device based
> macros to provide device specific logging.
> 
> No functional changes.
> 
> Generated using the following semantic patch, originally written by
> Wambui Karuga <wambui.karu...@gmail.com>, with manual fixups on top:
> 
> @@
> identifier fn, T;
> @@
> 
> fn(...,struct drm_i915_private *T,...) {
> <+...
> (
> -DRM_INFO(
> +drm_info(&T->drm,
> ...)
> |
> -DRM_NOTE(
> +drm_notice(&T->drm,
> ...)
> |
> -DRM_ERROR(
> +drm_err(&T->drm,
> ...)
> |
> -DRM_WARN(
> +drm_warn(&T->drm,
> ...)
> |
> -DRM_DEBUG_DRIVER(
> +drm_dbg(&T->drm,
> ...)
> |
> -DRM_DEBUG_KMS(
> +drm_dbg_kms(&T->drm,
> ...)
> |
> -DRM_DEBUG_ATOMIC(
> +drm_dbg_atomic(&T->drm,
> ...)
> )
> ...+>
> }
> 
> @@
> identifier fn, T;
> @@
> 
> fn(...) {
> ...
> struct drm_i915_private *T = ...;
> <+...
> (
> -DRM_INFO(
> +drm_info(&T->drm,
> ...)
> |
> -DRM_NOTE(
> +drm_notice(&T->drm,
> ...)
> |
> -DRM_ERROR(
> +drm_err(&T->drm,
> ...)
> |
> -DRM_WARN(
> +drm_warn(&T->drm,
> ...)
> |
> -DRM_DEBUG_DRIVER(
> +drm_dbg(&T->drm,
> ...)
> |
> -DRM_DEBUG_KMS(
> +drm_dbg_kms(&T->drm,
> ...)
> |
> -DRM_DEBUG_ATOMIC(
> +drm_dbg_atomic(&T->drm,
> ...)
> )
> ...+>
> }
> 
> Cc: Wambui Karuga <wambui.karu...@gmail.com>
> Signed-off-by: Jani Nikula <jani.nik...@intel.com>
> ---
>  .../drm/i915/display/intel_display_power.c    | 22 +++++++++++++------
>  1 file changed, 15 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
> b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 246e406bb385..433e5a81dd4d 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -1873,20 +1873,27 @@ __async_put_domains_state_ok(struct 
> i915_power_domains *power_domains)
>  static void print_power_domains(struct i915_power_domains *power_domains,
>                               const char *prefix, u64 mask)
>  {
> +     struct drm_i915_private *i915 = container_of(power_domains,
> +                                                  struct drm_i915_private,
> +                                                  power_domains);

A power_to_i915() macro would find 3 uses in total, after your patch. With
or without that:

Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>

>       enum intel_display_power_domain domain;
>  
> -     DRM_DEBUG_DRIVER("%s (%lu):\n", prefix, hweight64(mask));
> +     drm_dbg(&i915->drm, "%s (%lu):\n", prefix, hweight64(mask));
>       for_each_power_domain(domain, mask)
> -             DRM_DEBUG_DRIVER("%s use_count %d\n",
> -                              intel_display_power_domain_str(domain),
> -                              power_domains->domain_use_count[domain]);
> +             drm_dbg(&i915->drm, "%s use_count %d\n",
> +                     intel_display_power_domain_str(domain),
> +                     power_domains->domain_use_count[domain]);
>  }
>  
>  static void
>  print_async_put_domains_state(struct i915_power_domains *power_domains)
>  {
> -     DRM_DEBUG_DRIVER("async_put_wakeref %u\n",
> -                      power_domains->async_put_wakeref);
> +     struct drm_i915_private *i915 = container_of(power_domains,
> +                                                  struct drm_i915_private,
> +                                                  power_domains);
> +
> +     drm_dbg(&i915->drm, "async_put_wakeref %u\n",
> +             power_domains->async_put_wakeref);
>  
>       print_power_domains(power_domains, "async_put_domains[0]",
>                           power_domains->async_put_domains[0]);
> @@ -4480,7 +4487,8 @@ void icl_dbuf_slices_update(struct drm_i915_private 
> *dev_priv,
>       drm_WARN(&dev_priv->drm, hweight8(req_slices) > max_slices,
>                "Invalid number of dbuf slices requested\n");
>  
> -     DRM_DEBUG_KMS("Updating dbuf slices to 0x%x\n", req_slices);
> +     drm_dbg_kms(&dev_priv->drm, "Updating dbuf slices to 0x%x\n",
> +                 req_slices);
>  
>       /*
>        * Might be running this in parallel to gen9_dc_off_power_well_enable
> -- 
> 2.20.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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