On Wed, Feb 12, 2020 at 07:43:51PM +0200, Jani Nikula wrote:
> On Wed, 12 Feb 2020, Ville Syrjala <ville.syrj...@linux.intel.com> wrote:
> > From: Ville Syrjälä <ville.syrj...@linux.intel.com>
> >
> > Make the PFIT_PIPE stuff less ugly via parametrization.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> > ---
> > drivers/gpu/drm/i915/display/intel_panel.c | 3 +--
> > drivers/gpu/drm/i915/i915_reg.h | 1 +
> > 2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_panel.c
> > b/drivers/gpu/drm/i915/display/intel_panel.c
> > index cba2f1c2557f..8b0730f4c442 100644
> > --- a/drivers/gpu/drm/i915/display/intel_panel.c
> > +++ b/drivers/gpu/drm/i915/display/intel_panel.c
> > @@ -434,8 +434,7 @@ void intel_gmch_panel_fitting(struct intel_crtc
> > *intel_crtc,
> > /* 965+ wants fuzzy fitting */
> > /* FIXME: handle multiple panels by failing gracefully */
> > if (INTEL_GEN(dev_priv) >= 4)
> > - pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
> > - PFIT_FILTER_FUZZY);
> > + pfit_control |= PFIT_PIPE(intel_crtc->pipe) | PFIT_FILTER_FUZZY;
> >
> > out:
> > if ((pfit_control & PFIT_ENABLE) == 0) {
> > diff --git a/drivers/gpu/drm/i915/i915_reg.h
> > b/drivers/gpu/drm/i915/i915_reg.h
> > index b09c1d6dc0aa..faf8945a51b0 100644
> > --- a/drivers/gpu/drm/i915/i915_reg.h
> > +++ b/drivers/gpu/drm/i915/i915_reg.h
> > @@ -4928,6 +4928,7 @@ enum {
> > #define PFIT_ENABLE (1 << 31)
> > #define PFIT_PIPE_MASK (3 << 29)
> > #define PFIT_PIPE_SHIFT 29
> > +#define PFIT_PIPE(pipe) ((pipe) << 29)
>
> This is fine, but might have as well defined this in terms of
> REG_FIELD_PREP. I especially like it for parametrized stuff because it
> ensures we don't flood the value outside the field.
>
> Reviewed-by: Jani Nikula <jani.nik...@intel.com>
Was just reviewing this series and noticed that Jani had suggested using
REG_FIELD_PREP stuff here, are you going to change that Ville?
Looks good otherwise
Manasi
>
> > #define VERT_INTERP_DISABLE (0 << 10)
> > #define VERT_INTERP_BILINEAR (1 << 10)
> > #define VERT_INTERP_MASK (3 << 10)
>
> --
> Jani Nikula, Intel Open Source Graphics Center
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
