On Wed, 2020-04-15 at 16:34 -0700, Matt Roper wrote: > As on ICL, we want to use the Type-C aux handlers for the TBT aux > wells > to ensure the DP_AUX_CH_CTL_TBT_IO flag is set properly.
Reviewed-by: José Roberto de Souza <jose.so...@intel.com> > > Fixes: 656409bbaf87 ("drm/i915/tgl: Add power well support") > Cc: José Roberto de Souza <jose.so...@intel.com> > Cc: Imre Deak <imre.d...@intel.com> > Signed-off-by: Matt Roper <matthew.d.ro...@intel.com> > --- > drivers/gpu/drm/i915/display/intel_display_power.c | 12 ++++++------ > 1 file changed, 6 insertions(+), 6 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c > b/drivers/gpu/drm/i915/display/intel_display_power.c > index 6cc0e23ca566..03bdde19c8c9 100644 > --- a/drivers/gpu/drm/i915/display/intel_display_power.c > +++ b/drivers/gpu/drm/i915/display/intel_display_power.c > @@ -4147,7 +4147,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX D TBT1", > .domains = TGL_AUX_D_TBT1_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, > @@ -4158,7 +4158,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX E TBT2", > .domains = TGL_AUX_E_TBT2_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, > @@ -4169,7 +4169,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX F TBT3", > .domains = TGL_AUX_F_TBT3_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, > @@ -4180,7 +4180,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX G TBT4", > .domains = TGL_AUX_G_TBT4_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, > @@ -4191,7 +4191,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX H TBT5", > .domains = TGL_AUX_H_TBT5_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, > @@ -4202,7 +4202,7 @@ static const struct i915_power_well_desc > tgl_power_wells[] = { > { > .name = "AUX I TBT6", > .domains = TGL_AUX_I_TBT6_IO_POWER_DOMAINS, > - .ops = &hsw_power_well_ops, > + .ops = &icl_tc_phy_aux_power_well_ops, > .id = DISP_PW_ID_NONE, > { > .hsw.regs = &icl_aux_power_well_regs, _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx