When Rocket Lake is paired with a TGP PCH, the last two outputs utilize
the TC1 and TC2 hpd pins, even though these are combo outputs.
Bspec: 49181
Cc: Lucas De Marchi <lucas.demar...@intel.com>
Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 6952b0295096..d32bbcd99b8a 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -6172,8 +6172,12 @@ static bool bxt_digital_port_connected(struct
intel_encoder *encoder)
static bool intel_combo_phy_connected(struct drm_i915_private *dev_priv,
enum phy phy)
{
- if (HAS_PCH_MCC(dev_priv) && phy == PHY_C)
- return intel_de_read(dev_priv, SDEISR) &
SDE_TC_HOTPLUG_ICP(PORT_TC1);
+ if (IS_ROCKETLAKE(dev_priv) && phy >= PHY_C)
+ return intel_de_read(dev_priv, SDEISR) &
+ SDE_TC_HOTPLUG_ICP(phy - PHY_C);
+ else if (HAS_PCH_MCC(dev_priv) && phy == PHY_C)
+ return intel_de_read(dev_priv, SDEISR) &
+ SDE_TC_HOTPLUG_ICP(PORT_TC1);
return intel_de_read(dev_priv, SDEISR) & SDE_DDI_HOTPLUG_ICP(phy);
}
--
2.24.1
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