Quoting Mika Kuoppala (2020-04-30 16:47:28) > diff --git a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > index b3cf09657fb2..534e435f20bc 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > +++ b/drivers/gpu/drm/i915/gt/intel_gpu_commands.h > @@ -237,7 +237,7 @@ > #define PIPE_CONTROL_INSTRUCTION_CACHE_INVALIDATE (1<<11) /* MBZ on ILK > */ > #define PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE (1<<10) /* > GM45+ only */ > #define PIPE_CONTROL_INDIRECT_STATE_DISABLE (1<<9) > -#define PIPE_CONTROL_HDC_PIPELINE_FLUSH REG_BIT(9) /* gen12 > */ > +#define PIPE_CONTROL0_HDC_PIPELINE_FLUSH REG_BIT(9) /* gen12 > */ > #define PIPE_CONTROL_NOTIFY (1<<8) > #define PIPE_CONTROL_FLUSH_ENABLE (1<<7) /* gen7+ */ > #define PIPE_CONTROL_DC_FLUSH_ENABLE (1<<5)
Confirmed. With the naming inversion resolved, Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk> -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
