On Mon, May 18, 2020 at 03:23:00PM +0300, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrj...@linux.intel.com>
>
> Dbuf slice tracking busted across runtime PM. Back to the
> drawing board.
>
> This reverts commit 70b1a26f299c729cc1a5099374cc02568b05ec7d.
>
> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/intel_pm.c | 26 +++++++-------------------
> 1 file changed, 7 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index a21e36ed1a77..d40d22eb65da 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4105,6 +4105,10 @@ skl_ddb_get_pipe_allocation_limits(struct
> drm_i915_private *dev_priv,
> */
> dbuf_slice_mask = skl_compute_dbuf_slices(crtc_state, active_pipes);
>
> + DRM_DEBUG_KMS("DBuf slice mask %x pipe %c active pipes %x\n",
> + dbuf_slice_mask,
> + pipe_name(for_pipe), active_pipes);
> +
Just wanted to say as a joke that if I would be adding those, you
would say that those are redundant debugs.. and then figured out
that those were mine initially :)
Ok - back to the drawing board!
Reviewed-by: Stanislav Lisovskiy <stanislav.lisovs...@intel.com>
> /*
> * Figure out at which DBuf slice we start, i.e if we start at Dbuf S2
> * and slice size is 1024, the offset would be 1024
> @@ -4187,10 +4191,8 @@ skl_ddb_get_pipe_allocation_limits(struct
> drm_i915_private *dev_priv,
> alloc->start = offset + start;
> alloc->end = offset + end;
>
> - drm_dbg_kms(&dev_priv->drm,
> - "[CRTC:%d:%s] dbuf slices 0x%x, ddb (%d - %d), active pipes
> 0x%x\n",
> - for_crtc->base.id, for_crtc->name,
> - dbuf_slice_mask, alloc->start, alloc->end, active_pipes);
> + DRM_DEBUG_KMS("Pipe %d ddb %d-%d\n", for_pipe,
> + alloc->start, alloc->end);
>
> return 0;
> }
> @@ -5704,10 +5706,7 @@ skl_ddb_add_affected_planes(const struct
> intel_crtc_state *old_crtc_state,
> static int
> skl_compute_ddb(struct intel_atomic_state *state)
> {
> - struct drm_i915_private *dev_priv = to_i915(state->base.dev);
> - const struct intel_dbuf_state *old_dbuf_state;
> - const struct intel_dbuf_state *new_dbuf_state;
> - const struct intel_crtc_state *old_crtc_state;
> + struct intel_crtc_state *old_crtc_state;
> struct intel_crtc_state *new_crtc_state;
> struct intel_crtc *crtc;
> int ret, i;
> @@ -5724,17 +5723,6 @@ skl_compute_ddb(struct intel_atomic_state *state)
> return ret;
> }
>
> - old_dbuf_state = intel_atomic_get_old_dbuf_state(state);
> - new_dbuf_state = intel_atomic_get_new_dbuf_state(state);
> -
> - if (new_dbuf_state &&
> - new_dbuf_state->enabled_slices != old_dbuf_state->enabled_slices)
> - drm_dbg_kms(&dev_priv->drm,
> - "Enabled dbuf slices 0x%x -> 0x%x (out of %d dbuf
> slices)\n",
> - old_dbuf_state->enabled_slices,
> - new_dbuf_state->enabled_slices,
> - INTEL_INFO(dev_priv)->num_supported_dbuf_slices);
> -
> return 0;
> }
>
> --
> 2.26.2
>
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