From: Paulo Zanoni <paulo.r.zan...@intel.com>

The ironlake_irq_handler and ivybridge_irq_handler functions do
basically the same thing, but they have different implementation
styles. With this patch we reorganize ironlake_irq_handler in a way
that makes it look very similar to ivybridge_irq_handler.

One of the advantages of this new function style is that we don't
write 0 to the IIR registers anymore.

Signed-off-by: Paulo Zanoni <paulo.r.zan...@intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 44 ++++++++++++++++++++---------------------
 1 file changed, 22 insertions(+), 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 19370db..7bc36ae 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1407,33 +1407,33 @@ static irqreturn_t ironlake_irq_handler(int irq, void 
*arg)
        I915_WRITE(SDEIER, 0);
        POSTING_READ(SDEIER);
 
-       de_iir = I915_READ(DEIIR);
        gt_iir = I915_READ(GTIIR);
-       if (IS_GEN6(dev))
-               pm_iir = I915_READ(GEN6_PMIIR);
-
-       if (de_iir == 0 && gt_iir == 0 && (!IS_GEN6(dev) || pm_iir == 0))
-               goto done;
-
-       ret = IRQ_HANDLED;
-
-       if (IS_GEN5(dev))
-               ilk_gt_irq_handler(dev, dev_priv, gt_iir);
-       else
-               snb_gt_irq_handler(dev, dev_priv, gt_iir);
+       if (gt_iir) {
+               if (IS_GEN5(dev))
+                       ilk_gt_irq_handler(dev, dev_priv, gt_iir);
+               else
+                       snb_gt_irq_handler(dev, dev_priv, gt_iir);
+               I915_WRITE(GTIIR, gt_iir);
+               ret = IRQ_HANDLED;
+       }
 
-       if (de_iir)
+       de_iir = I915_READ(DEIIR);
+       if (de_iir) {
                ilk_display_irq_handler(dev, de_iir);
+               I915_WRITE(DEIIR, de_iir);
+               ret = IRQ_HANDLED;
+       }
 
-       if (IS_GEN6(dev) && pm_iir & GEN6_PM_RPS_EVENTS)
-               gen6_rps_irq_handler(dev_priv, pm_iir);
-
-       I915_WRITE(GTIIR, gt_iir);
-       I915_WRITE(DEIIR, de_iir);
-       if (IS_GEN6(dev))
-               I915_WRITE(GEN6_PMIIR, pm_iir);
+       if (IS_GEN6(dev)) {
+               pm_iir = I915_READ(GEN6_PMIIR);
+               if (pm_iir) {
+                       if (pm_iir & GEN6_PM_RPS_EVENTS)
+                               gen6_rps_irq_handler(dev_priv, pm_iir);
+                       I915_WRITE(GEN6_PMIIR, pm_iir);
+                       ret = IRQ_HANDLED;
+               }
+       }
 
-done:
        I915_WRITE(DEIER, de_ier);
        POSTING_READ(DEIER);
        I915_WRITE(SDEIER, sde_ier);
-- 
1.8.1.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to