DG1 has the south engine display on the same PCI device. Ideally we
could use HAS_PCH_SPLIT(), but that macro is misused all across the
code base to rather signify a range of gens. So add a fake one for DG1
to be used where needed.

Cc: Aditya Swarup <aditya.swa...@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
---
 drivers/gpu/drm/i915/intel_pch.c | 6 ++++++
 drivers/gpu/drm/i915/intel_pch.h | 4 ++++
 2 files changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_pch.c b/drivers/gpu/drm/i915/intel_pch.c
index c668e99eb2e4..6c97192e9ca8 100644
--- a/drivers/gpu/drm/i915/intel_pch.c
+++ b/drivers/gpu/drm/i915/intel_pch.c
@@ -188,6 +188,12 @@ void intel_detect_pch(struct drm_i915_private *dev_priv)
 {
        struct pci_dev *pch = NULL;
 
+       /* DG1 has south engine display on the same PCI device */
+       if (IS_DG1(dev_priv)) {
+               dev_priv->pch_type = PCH_DG1;
+               return;
+       }
+
        /*
         * The reason to probe ISA bridge instead of Dev31:Fun0 is to
         * make graphics device passthrough work easy for VMM, that only
diff --git a/drivers/gpu/drm/i915/intel_pch.h b/drivers/gpu/drm/i915/intel_pch.h
index 3053d1ce398b..06d2cd50af0b 100644
--- a/drivers/gpu/drm/i915/intel_pch.h
+++ b/drivers/gpu/drm/i915/intel_pch.h
@@ -26,6 +26,9 @@ enum intel_pch {
        PCH_JSP,        /* Jasper Lake PCH */
        PCH_MCC,        /* Mule Creek Canyon PCH */
        PCH_TGP,        /* Tiger Lake PCH */
+
+       /* Fake PCHs, functionality handled on the same PCI dev */
+       PCH_DG1 = 1024,
 };
 
 #define INTEL_PCH_DEVICE_ID_MASK               0xff80
@@ -56,6 +59,7 @@ enum intel_pch {
 
 #define INTEL_PCH_TYPE(dev_priv)               ((dev_priv)->pch_type)
 #define INTEL_PCH_ID(dev_priv)                 ((dev_priv)->pch_id)
+#define HAS_PCH_DG1(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == 
PCH_DG1)
 #define HAS_PCH_JSP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == 
PCH_JSP)
 #define HAS_PCH_MCC(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == 
PCH_MCC)
 #define HAS_PCH_TGP(dev_priv)                  (INTEL_PCH_TYPE(dev_priv) == 
PCH_TGP)
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to