From: Anshuman Gupta <anshuman.gu...@intel.com>

DC6 is not supported on DG1, so change the allowed DC mask for DG1.

Cc: Uma Shankar <uma.shan...@intel.com>
Signed-off-by: Anshuman Gupta <anshuman.gu...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_display_power.c | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c 
b/drivers/gpu/drm/i915/display/intel_display_power.c
index 7ff9c6d5a363..fff3a1d68678 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power.c
@@ -4689,7 +4689,10 @@ static u32 get_allowed_dc_mask(const struct 
drm_i915_private *dev_priv,
        int max_dc;
 
        if (INTEL_GEN(dev_priv) >= 12) {
-               max_dc = 4;
+               if (IS_DG1(dev_priv))
+                       max_dc = 3;
+               else
+                       max_dc = 4;
                /*
                 * DC9 has a separate HW flow from the rest of the DC states,
                 * not depending on the DMC firmware. It's needed by system
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to