In order to avoid functional breakage of mis-programmed applications that
have grown to depend on unused MOCS entries, we are programming
those entries to be equal to fully cached ("L3 + LLC") entry.
These reserved and unspecified entries should not be used as they may be
changed to less performant variants with better coherency in the future
if more entries are needed.
V2: As suggested by Lucas "De Marchi" to utilise __init_mocs_table for
programming default value, setting I915_MOCS_PTE index of tgl_mocs_table
with desired value.
Cc: Chris Wilson <ch...@chris-wilson.co.uk>
Cc: Lucas De Marchi <lucas.demar...@intel.com>
Cc: Tomasz Lis <tomasz....@intel.com>
Cc: Matt Roper <matthew.d.ro...@intel.com>
Cc: Joonas Lahtinen <joonas.lahti...@linux.intel.com>
Cc: Francisco Jerez <curroje...@riseup.net>
Cc: Mathew Alwin <alwin.mat...@intel.com>
Cc: Mcguire Russell W <russell.w.mcgu...@intel.com>
Cc: Spruit Neil R <neil.r.spr...@intel.com>
Cc: Zhou Cheng <cheng.z...@intel.com>
Cc: Benemelis Mike G <mike.g.beneme...@intel.com>
Signed-off-by: Ayaz A Siddiqui <ayaz.siddi...@intel.com>
---
drivers/gpu/drm/i915/gt/intel_mocs.c | 15 +++++++++++----
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_mocs.c
b/drivers/gpu/drm/i915/gt/intel_mocs.c
index 632e08a4592b2..c32f90bd56693 100644
--- a/drivers/gpu/drm/i915/gt/intel_mocs.c
+++ b/drivers/gpu/drm/i915/gt/intel_mocs.c
@@ -234,11 +234,17 @@ static const struct drm_i915_mocs_entry
broxton_mocs_table[] = {
L3_1_UC)
static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
- /* Base - Error (Reserved for Non-Use) */
- MOCS_ENTRY(0, 0x0, 0x0),
- /* Base - Reserved */
- MOCS_ENTRY(1, 0x0, 0x0),
+ /* NOTE:
+ * Reserved and unspecified MOCS indices have been set to (L3 + LCC).
+ * These reserved entry should never be used, they may be chanaged
+ * to low performant variants with better coherency in the future if
+ * more entries are needed. We are programming index I915_MOCS_PTE(1)
+ * only, __init_mocs_table() take care to prgramm unseud index with
+ * this entry.
+ */
+ MOCS_ENTRY(1, LE_3_WB | LE_TC_1_LLC | LE_LRUM(3),
+ L3_3_WB),
GEN11_MOCS_ENTRIES,
/* Implicitly enable L1 - HDC:L1 + L3 + LLC */
@@ -265,6 +271,7 @@ static const struct drm_i915_mocs_entry tgl_mocs_table[] = {
MOCS_ENTRY(61,
LE_1_UC | LE_TC_1_LLC,
L3_3_WB),
+
};
static const struct drm_i915_mocs_entry icl_mocs_table[] = {
--
2.26.2
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