> On Sep 11, 2020, at 9:00 PM, Dhanavanthri, Swathi
> <swathi.dhanavant...@intel.com> wrote:
>
> It is in the if statement: if (IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915)) {
duh! sorry...
more below:
>
> -----Original Message-----
> From: Rodrigo Vivi <rodrigo.v...@intel.com>
> Sent: Friday, September 11, 2020 6:10 PM
> To: Dhanavanthri, Swathi <swathi.dhanavant...@intel.com>
> Cc: intel-gfx@lists.freedesktop.org
> Subject: Re: [Intel-gfx] [PATCH] drm/i915/tgl, rkl: Make
> Wa_1606700617/22010271021 permanent
>
> On Fri, Sep 11, 2020 at 03:11:58PM -0700, Swathi Dhanavanthri wrote:
>> This workaround applies to all TGL and RKL steppings.
>>
>> Signed-off-by: Swathi Dhanavanthri <swathi.dhanavant...@intel.com>
>> ---
>> drivers/gpu/drm/i915/gt/intel_workarounds.c | 7 ++++---
>> 1 file changed, 4 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> index 39817c5a7058..6c580d0d9ea8 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
>> @@ -1729,10 +1729,11 @@ rcs_engine_wa_init(struct intel_engine_cs *engine,
>> struct i915_wa_list *wal)
>> GEN6_RC_SLEEP_PSMI_CONTROL,
>> GEN12_WAIT_FOR_EVENT_POWER_DOWN_DISABLE |
>> GEN8_RC_SEMA_IDLE_MSG_DISABLE);
>> - }
now I noticed this ^ :)
>>
>> - if (IS_TGL_U(i915) || IS_TGL_Y(i915)) {
>
> please notice this function is called for other gens.
> In case you need to extend this to other platforms, please add them to the if
> instead of removing the if.
>
>> - /* Wa_1606700617:tgl */
>> + /*
>> + * Wa_1606700617:tgl
>> + * Wa_22010271021:tgl,rkl
1. This HSD only mentions TGL-U. No mention to RKL.
2. No mention to anything related to this clock gate.
3. Actually no W/a description at all and no sw_impact at all. But It links to
another entry 22010288313,
which describes the w/a as a 3dstate ff one...
What am I missing here?
Thanks,
Rodrigo.
>> + */
>> wa_masked_en(wal,
>> GEN9_CS_DEBUG_MODE1,
>> FF_DOP_CLOCK_GATE_DISABLE);
>> --
>> 2.20.1
>>
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