From: Michal Wajdeczko <michal.wajdec...@intel.com>
Starting GuC firmware version 40.0 reg_state_buffer is maintained
internally by the GuC as part of "private data".
Signed-off-by: Michal Wajdeczko <michal.wajdec...@intel.com>
---
drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 2 --
drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 2 +-
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
index 7c16ade44b2b..a662825f67ad 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c
@@ -83,7 +83,6 @@ struct __guc_ads_blob {
struct guc_gt_system_info system_info;
struct guc_clients_info clients_info;
struct guc_ct_pool_entry ct_pool[GUC_CT_POOL_SIZE];
- u8 reg_state_buffer[GUC_S3_SAVE_SPACE_PAGES * PAGE_SIZE];
} __packed;
static void __guc_ads_init(struct intel_guc *guc)
@@ -141,7 +140,6 @@ static void __guc_ads_init(struct intel_guc *guc)
/* ADS */
blob->ads.scheduler_policies = base + ptr_offset(blob, policies);
- blob->ads.reg_state_buffer = base + ptr_offset(blob, reg_state_buffer);
blob->ads.reg_state_addr = base + ptr_offset(blob, reg_state);
blob->ads.gt_system_info = base + ptr_offset(blob, system_info);
blob->ads.clients_info = base + ptr_offset(blob, clients_info);
diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
index d4e2c32f44cf..f375388e8c50 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h
@@ -407,7 +407,7 @@ struct guc_clients_info {
/* GuC Additional Data Struct */
struct guc_ads {
u32 reg_state_addr;
- u32 reg_state_buffer;
+ u32 reserved0;
u32 scheduler_policies;
u32 gt_system_info;
u32 clients_info;
--
2.25.1
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