On 10/12/20 2:29 PM, Lucas De Marchi wrote:
> DG1 has one more combo phy port, no TC and all irq handling goes through
> SDE, like for MCC.
> 
> v2: Also change intel_hpd_pin_default() to include DG1 mapping
> v3: Rebase on hpd refactor
> 
> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
> Cc: Anshuman Gupta <anshuman.gu...@intel.com>
> Cc: José Roberto de Souza <jose.so...@intel.com>
> Cc: Imre Deak <imre.d...@intel.com>
> Signed-off-by: Lucas De Marchi <lucas.demar...@intel.com>
> ---
>  drivers/gpu/drm/i915/i915_irq.c | 58 +++++++++++++++++++++++++++++----
>  drivers/gpu/drm/i915/i915_reg.h |  8 +++++
>  2 files changed, 59 insertions(+), 7 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
> index b753c77c9a77..0d6e4894b505 100644
> --- a/drivers/gpu/drm/i915/i915_irq.c
> +++ b/drivers/gpu/drm/i915/i915_irq.c
> @@ -152,6 +152,13 @@ static const u32 hpd_icp[HPD_NUM_PINS] = {
>       [HPD_PORT_TC6] = SDE_TC_HOTPLUG_ICP(PORT_TC6),
>  };
>  
> +static const u32 hpd_dg1_sde[HPD_NUM_PINS] = {
> +     [HPD_PORT_A] = SDE_DDI_HOTPLUG_ICP(PHY_A),
> +     [HPD_PORT_B] = SDE_DDI_HOTPLUG_ICP(PHY_B),
> +     [HPD_PORT_D] = SDE_DDI_HOTPLUG_ICP(PHY_C),
> +     [HPD_PORT_E] = SDE_DDI_HOTPLUG_ICP(PHY_D),
> +};
> +
>  static void intel_hpd_init_pins(struct drm_i915_private *dev_priv)
>  {
>       struct i915_hotplug *hpd = &dev_priv->hotplug;
> @@ -176,11 +183,14 @@ static void intel_hpd_init_pins(struct drm_i915_private 
> *dev_priv)
>       else
>               hpd->hpd = hpd_ilk;
>  
> -     if (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv))
> +     if ((INTEL_PCH_TYPE(dev_priv) < PCH_DG1) &&
> +         (!HAS_PCH_SPLIT(dev_priv) || HAS_PCH_NOP(dev_priv)))
>               return;
>  
> -     if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||
> -         HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
> +     if (HAS_PCH_DG1(dev_priv))
> +             hpd->pch_hpd = hpd_dg1_sde;
> +     else if (HAS_PCH_TGP(dev_priv) || HAS_PCH_JSP(dev_priv) ||
> +              HAS_PCH_ICP(dev_priv) || HAS_PCH_MCC(dev_priv))
>               hpd->pch_hpd = hpd_icp;
>       else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_SPT(dev_priv))
>               hpd->pch_hpd = hpd_spt;
> @@ -1079,6 +1089,22 @@ static bool icp_ddi_port_hotplug_long_detect(enum 
> hpd_pin pin, u32 val)
>       }
>  }
>  
> +static bool dg1_ddi_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
> +{
> +     switch (pin) {
> +     case HPD_PORT_A:
> +             return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_A);
> +     case HPD_PORT_B:
> +             return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_B);
> +     case HPD_PORT_D:
> +             return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_C);
> +     case HPD_PORT_E:
> +             return val & SHOTPLUG_CTL_DDI_HPD_LONG_DETECT(PORT_D);
> +     default:
> +             return false;
> +     }
> +}
> +
>  static bool icp_tc_port_hotplug_long_detect(enum hpd_pin pin, u32 val)
>  {
>       switch (pin) {
> @@ -1863,12 +1889,19 @@ static void icp_irq_handler(struct drm_i915_private 
> *dev_priv, u32 pch_iir)
>  {
>       u32 ddi_hotplug_trigger, tc_hotplug_trigger;
>       u32 pin_mask = 0, long_mask = 0;
> +     bool (*ddi_port_hotplug_long_detect)(enum hpd_pin pin, u32 val);
>  
> -     if (HAS_PCH_TGP(dev_priv)) {
> +     if (HAS_PCH_DG1(dev_priv)) {
> +             ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_DG1;
> +             ddi_port_hotplug_long_detect = dg1_ddi_port_hotplug_long_detect;
> +             tc_hotplug_trigger = 0;
> +     } else if (HAS_PCH_TGP(dev_priv)) {
>               ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
> +             ddi_port_hotplug_long_detect = icp_ddi_port_hotplug_long_detect;
>               tc_hotplug_trigger = pch_iir & SDE_TC_MASK_TGP;
>       } else if (HAS_PCH_JSP(dev_priv)) {
>               ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_TGP;
> +             ddi_port_hotplug_long_detect = icp_ddi_port_hotplug_long_detect;
>               tc_hotplug_trigger = 0;
>       } else if (HAS_PCH_MCC(dev_priv)) {
>               ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
Missing ddi_port_hotplug_long_detect assignment for HAS_PCH_MCC. 

Just a suggestion: We can by default assign ddi_port_hotplug_long_detect with 
icp_ddi_port_hotplug_long_detect
outside the if else branching(during declaration).
Assign the func ptr within platform checks only if it is different from icp 
like in the case for dg1.

Aditya
> @@ -1879,6 +1912,7 @@ static void icp_irq_handler(struct drm_i915_private 
> *dev_priv, u32 pch_iir)
>                        INTEL_PCH_TYPE(dev_priv));
>  
>               ddi_hotplug_trigger = pch_iir & SDE_DDI_MASK_ICP;
> +             ddi_port_hotplug_long_detect = icp_ddi_port_hotplug_long_detect;
>               tc_hotplug_trigger = pch_iir & SDE_TC_MASK_ICP;
>       }
>  
> @@ -1891,7 +1925,7 @@ static void icp_irq_handler(struct drm_i915_private 
> *dev_priv, u32 pch_iir)
>               intel_get_hpd_pins(dev_priv, &pin_mask, &long_mask,
>                                  ddi_hotplug_trigger, dig_hotplug_reg,
>                                  dev_priv->hotplug.pch_hpd,
> -                                icp_ddi_port_hotplug_long_detect);
> +                                ddi_port_hotplug_long_detect);
>       }
>  
>       if (tc_hotplug_trigger) {
> @@ -3252,6 +3286,12 @@ static void jsp_hpd_irq_setup(struct drm_i915_private 
> *dev_priv)
>                         TGP_DDI_HPD_ENABLE_MASK, 0);
>  }
>  
> +static void dg1_hpd_irq_setup(struct drm_i915_private *dev_priv)
> +{
> +     icp_hpd_irq_setup(dev_priv,
> +                       DG1_DDI_HPD_ENABLE_MASK, 0);
> +}
> +
>  static void gen11_hpd_detection_setup(struct drm_i915_private *dev_priv)
>  {
>       u32 hotplug;
> @@ -3645,7 +3685,9 @@ static void icp_irq_postinstall(struct drm_i915_private 
> *dev_priv)
>       gen3_assert_iir_is_zero(&dev_priv->uncore, SDEIIR);
>       I915_WRITE(SDEIMR, ~mask);
>  
> -     if (HAS_PCH_TGP(dev_priv)) {
> +     if (HAS_PCH_DG1(dev_priv))
> +             icp_ddi_hpd_detection_setup(dev_priv, DG1_DDI_HPD_ENABLE_MASK);
> +     else if (HAS_PCH_TGP(dev_priv)) {
>               icp_ddi_hpd_detection_setup(dev_priv, TGP_DDI_HPD_ENABLE_MASK);
>               icp_tc_hpd_detection_setup(dev_priv, TGP_TC_HPD_ENABLE_MASK);
>       } else if (HAS_PCH_JSP(dev_priv)) {
> @@ -4162,7 +4204,9 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
>               if (I915_HAS_HOTPLUG(dev_priv))
>                       dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
>       } else {
> -             if (HAS_PCH_JSP(dev_priv))
> +             if (HAS_PCH_DG1(dev_priv))
> +                     dev_priv->display.hpd_irq_setup = dg1_hpd_irq_setup;
> +             else if (HAS_PCH_JSP(dev_priv))
>                       dev_priv->display.hpd_irq_setup = jsp_hpd_irq_setup;
>               else if (HAS_PCH_MCC(dev_priv))
>                       dev_priv->display.hpd_irq_setup = mcc_hpd_irq_setup;
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 49945e33f573..e7f1aac553d0 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8230,6 +8230,10 @@ enum {
>                                        SDE_TC_HOTPLUG_ICP(PORT_TC3) | \
>                                        SDE_TC_HOTPLUG_ICP(PORT_TC2) | \
>                                        SDE_TC_HOTPLUG_ICP(PORT_TC1))
> +#define SDE_DDI_MASK_DG1             (SDE_DDI_HOTPLUG_ICP(PORT_D) | \
> +                                      SDE_DDI_HOTPLUG_ICP(PORT_C) | \
> +                                      SDE_DDI_HOTPLUG_ICP(PORT_B) | \
> +                                      SDE_DDI_HOTPLUG_ICP(PORT_A))
>  
>  #define SDEISR  _MMIO(0xc4000)
>  #define SDEIMR  _MMIO(0xc4004)
> @@ -8429,6 +8433,10 @@ enum {
>  #define TGP_TC_HPD_ENABLE_MASK               (ICP_TC_HPD_ENABLE(PORT_TC6) | \
>                                        ICP_TC_HPD_ENABLE(PORT_TC5) | \
>                                        ICP_TC_HPD_ENABLE_MASK)
> +#define DG1_DDI_HPD_ENABLE_MASK              
> (SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_D) | \
> +                                      SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_C) | \
> +                                      SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_B) | \
> +                                      SHOTPLUG_CTL_DDI_HPD_ENABLE(PORT_A))
>  
>  #define _PCH_DPLL_A              0xc6014
>  #define _PCH_DPLL_B              0xc6018
> 

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