Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe).
Create a separate mechanism for lspcon compared to HDMI in order to
address the same and ensure future scalability.

v2: Streamlined this as per Ville's suggestions, making sure that
HDMI infoframe versions are directly returned instead of a redundant
and confusing DIP overhead.

Suggested-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
Signed-off-by: Uma Shankar <uma.shan...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_ddi.c    | 10 +++++++---
 drivers/gpu/drm/i915/display/intel_lspcon.c |  9 +++++++++
 drivers/gpu/drm/i915/display/intel_lspcon.h |  2 ++
 3 files changed, 18 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 92940a0c5ef8..48da5dc59939 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -4583,6 +4583,7 @@ static void intel_ddi_read_func_ctl(struct intel_encoder 
*encoder,
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->uapi.crtc);
        enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
+       struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
        u32 temp, flags = 0;
 
        temp = intel_de_read(dev_priv, TRANS_DDI_FUNC_CTL(cpu_transcoder));
@@ -4657,9 +4658,12 @@ static void intel_ddi_read_func_ctl(struct intel_encoder 
*encoder,
                                    pipe_config->fec_enable);
                }
 
-               pipe_config->infoframes.enable |=
-                       intel_hdmi_infoframes_enabled(encoder, pipe_config);
-
+               if (dig_port->lspcon.active && dig_port->dp.has_hdmi_sink)
+                       pipe_config->infoframes.enable |=
+                               intel_lspcon_infoframes_enabled(encoder, 
pipe_config);
+               else
+                       pipe_config->infoframes.enable |=
+                               intel_hdmi_infoframes_enabled(encoder, 
pipe_config);
                break;
        case TRANS_DDI_MODE_SELECT_DP_MST:
                pipe_config->output_types |= BIT(INTEL_OUTPUT_DP_MST);
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.c 
b/drivers/gpu/drm/i915/display/intel_lspcon.c
index 592c19deba00..303f23d35020 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.c
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.c
@@ -30,6 +30,7 @@
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_lspcon.h"
+#include "intel_hdmi.h"
 
 /* LSPCON OUI Vendor ID(signatures) */
 #define LSPCON_VENDOR_PARADE_OUI 0x001CF8
@@ -601,6 +602,14 @@ bool lspcon_init(struct intel_digital_port *dig_port)
        return true;
 }
 
+u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder,
+                                   const struct intel_crtc_state *pipe_config)
+{
+       struct intel_digital_port *dig_port = enc_to_dig_port(encoder);
+
+       return dig_port->infoframes_enabled(encoder, pipe_config);
+}
+
 void lspcon_resume(struct intel_digital_port *dig_port)
 {
        struct intel_lspcon *lspcon = &dig_port->lspcon;
diff --git a/drivers/gpu/drm/i915/display/intel_lspcon.h 
b/drivers/gpu/drm/i915/display/intel_lspcon.h
index 42ccb21c908f..44aa6bc38512 100644
--- a/drivers/gpu/drm/i915/display/intel_lspcon.h
+++ b/drivers/gpu/drm/i915/display/intel_lspcon.h
@@ -33,6 +33,8 @@ void lspcon_set_infoframes(struct intel_encoder *encoder,
                           const struct drm_connector_state *conn_state);
 u32 lspcon_infoframes_enabled(struct intel_encoder *encoder,
                              const struct intel_crtc_state *pipe_config);
+u32 intel_lspcon_infoframes_enabled(struct intel_encoder *encoder,
+                                   const struct intel_crtc_state *pipe_config);
 void hsw_write_infoframe(struct intel_encoder *encoder,
                         const struct intel_crtc_state *crtc_state,
                         unsigned int type,
-- 
2.26.2

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to