On Fri, Dec 04, 2020 at 05:08:34PM -0800, Aditya Swarup wrote: > - ADL-S driver internal mapping uses PORT D, E, F, G for Combo phy B, C, D > and E. > - Add ADLS specific port mappings for vbt port dvo settings. > - Select appropriate AUX CH specific to ADLS based on port mapping.
The aux stuff is getting really messy; we're definitely going to have to move to a table-based approach for some of this stuff soon to keep it from getting too out of hand. The changes here look correct for the current style though. Reviewed-by: Matt Roper <matthew.d.ro...@intel.com> > > Cc: Jani Nikula <jani.nik...@intel.com> > Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> > Cc: Imre Deak <imre.d...@intel.com> > Cc: Matt Roper <matthew.d.ro...@intel.com> > Cc: Lucas De Marchi <lucas.demar...@intel.com> > Signed-off-by: Aditya Swarup <aditya.swa...@intel.com> > --- > drivers/gpu/drm/i915/display/intel_bios.c | 57 ++++++++++++++++++----- > 1 file changed, 46 insertions(+), 11 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_bios.c > b/drivers/gpu/drm/i915/display/intel_bios.c > index 9dc67c03ffc0..8f166f49b6cc 100644 > --- a/drivers/gpu/drm/i915/display/intel_bios.c > +++ b/drivers/gpu/drm/i915/display/intel_bios.c > @@ -1709,8 +1709,26 @@ static enum port dvo_port_to_port(struct > drm_i915_private *dev_priv, > [PORT_TC1] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, > [PORT_TC2] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, > }; > + /* > + * Alderlake S ports used in the driver are PORT_A, PORT_D, PORT_E, > + * PORT_F and PORT_G, we need to map that to correct VBT sections. > + */ > + static const int adls_port_mapping[][3] = { > + [PORT_A] = { DVO_PORT_HDMIA, DVO_PORT_DPA, -1 }, > + [PORT_B] = { -1 }, > + [PORT_C] = { -1 }, > + [PORT_TC1] = { DVO_PORT_HDMIB, DVO_PORT_DPB, -1 }, > + [PORT_TC2] = { DVO_PORT_HDMIC, DVO_PORT_DPC, -1 }, > + [PORT_TC3] = { DVO_PORT_HDMID, DVO_PORT_DPD, -1 }, > + [PORT_TC4] = { DVO_PORT_HDMIE, DVO_PORT_DPE, -1 }, > + }; > > - if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) > + if (IS_ALDERLAKE_S(dev_priv)) > + return __dvo_port_to_port(ARRAY_SIZE(adls_port_mapping), > + ARRAY_SIZE(adls_port_mapping[0]), > + adls_port_mapping, > + dvo_port); > + else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) > return __dvo_port_to_port(ARRAY_SIZE(rkl_port_mapping), > ARRAY_SIZE(rkl_port_mapping[0]), > rkl_port_mapping, > @@ -2667,27 +2685,44 @@ enum aux_ch intel_bios_port_aux_ch(struct > drm_i915_private *dev_priv, > return aux_ch; > } > > + /* > + * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D > + * map to DDI A,B,TC1,TC2 respectively. > + * > + * ADL-S VBT uses PHY based mapping. Combo PHYs A,B,C,D,E > + * map to DDI A,TC1,TC2,TC3,TC4 respectively. > + */ > switch (info->alternate_aux_channel) { > case DP_AUX_A: > aux_ch = AUX_CH_A; > break; > case DP_AUX_B: > - aux_ch = AUX_CH_B; > + if (IS_ALDERLAKE_S(dev_priv)) > + aux_ch = AUX_CH_USBC1; > + else > + aux_ch = AUX_CH_B; > break; > case DP_AUX_C: > - /* > - * RKL/DG1 VBT uses PHY based mapping. Combo PHYs A,B,C,D > - * map to DDI A,B,TC1,TC2 respectively. > - */ > - aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ? > - AUX_CH_USBC1 : AUX_CH_C; > + if (IS_ALDERLAKE_S(dev_priv)) > + aux_ch = AUX_CH_USBC2; > + else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) > + aux_ch = AUX_CH_USBC1; > + else > + aux_ch = AUX_CH_C; > break; > case DP_AUX_D: > - aux_ch = (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) ? > - AUX_CH_USBC2 : AUX_CH_D; > + if (IS_ALDERLAKE_S(dev_priv)) > + aux_ch = AUX_CH_USBC3; > + else if (IS_DG1(dev_priv) || IS_ROCKETLAKE(dev_priv)) > + aux_ch = AUX_CH_USBC2; > + else > + aux_ch = AUX_CH_D; > break; > case DP_AUX_E: > - aux_ch = AUX_CH_E; > + if (IS_ALDERLAKE_S(dev_priv)) > + aux_ch = AUX_CH_USBC4; > + else > + aux_ch = AUX_CH_E; > break; > case DP_AUX_F: > aux_ch = AUX_CH_F; > -- > 2.27.0 > -- Matt Roper Graphics Software Engineer VTT-OSGC Platform Enablement Intel Corporation (916) 356-2795 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx