[Intel-gfx] [PATCH v7 26/63] drm/i915: Make lrc_init_wa_ctx compatible with ww locking, v2.

[Maarten Lankhorst]

Make creation separate from pinning, in order to take the lock only
once, and pin the mapping with the lock held.

Changes since v1:
- Rebase on top of upstream changes.

Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Thomas Hellström <thomas.hellst...@linux.intel.com>
---
 drivers/gpu/drm/i915/gt/intel_lrc.c | 44 +++++++++++++++++++++++------
 1 file changed, 36 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c 
b/drivers/gpu/drm/i915/gt/intel_lrc.c
index 8508b8d701c1..9255dd15c8b4 100644
--- a/drivers/gpu/drm/i915/gt/intel_lrc.c
+++ b/drivers/gpu/drm/i915/gt/intel_lrc.c
@@ -1421,7 +1421,7 @@ gen10_init_indirectctx_bb(struct intel_engine_cs *engine, 
u32 *batch)
 
 #define CTX_WA_BB_SIZE (PAGE_SIZE)
 
-static int lrc_setup_wa_ctx(struct intel_engine_cs *engine)
+static int lrc_create_wa_ctx(struct intel_engine_cs *engine)
 {
        struct drm_i915_gem_object *obj;
        struct i915_vma *vma;
@@ -1437,10 +1437,6 @@ static int lrc_setup_wa_ctx(struct intel_engine_cs 
*engine)
                goto err;
        }
 
-       err = i915_ggtt_pin(vma, NULL, 0, PIN_HIGH);
-       if (err)
-               goto err;
-
        engine->wa_ctx.vma = vma;
        return 0;
 
@@ -1466,6 +1462,7 @@ void lrc_init_wa_ctx(struct intel_engine_cs *engine)
                &wa_ctx->indirect_ctx, &wa_ctx->per_ctx
        };
        wa_bb_func_t wa_bb_fn[ARRAY_SIZE(wa_bb)];
+       struct i915_gem_ww_ctx ww;
        void *batch, *batch_ptr;
        unsigned int i;
        int err;
@@ -1494,7 +1491,7 @@ void lrc_init_wa_ctx(struct intel_engine_cs *engine)
                return;
        }
 
-       err = lrc_setup_wa_ctx(engine);
+       err = lrc_create_wa_ctx(engine);
        if (err) {
                /*
                 * We continue even if we fail to initialize WA batch
@@ -1507,7 +1504,22 @@ void lrc_init_wa_ctx(struct intel_engine_cs *engine)
                return;
        }
 
+       if (!engine->wa_ctx.vma)
+               return;
+
+       i915_gem_ww_ctx_init(&ww, true);
+retry:
+       err = i915_gem_object_lock(wa_ctx->vma->obj, &ww);
+       if (!err)
+               err = i915_ggtt_pin(wa_ctx->vma, &ww, 0, PIN_HIGH);
+       if (err)
+               goto err;
+
        batch = i915_gem_object_pin_map(wa_ctx->vma->obj, I915_MAP_WB);
+       if (IS_ERR(batch)) {
+               err = PTR_ERR(batch);
+               goto err_unpin;
+       }
 
        /*
         * Emit the two workaround batch buffers, recording the offset from the
@@ -1532,8 +1544,24 @@ void lrc_init_wa_ctx(struct intel_engine_cs *engine)
        __i915_gem_object_release_map(wa_ctx->vma->obj);
 
        /* Verify that we can handle failure to setup the wa_ctx */
-       if (err || i915_inject_probe_error(engine->i915, -ENODEV))
-               lrc_fini_wa_ctx(engine);
+       if (!err)
+               err = i915_inject_probe_error(engine->i915, -ENODEV);
+
+err_unpin:
+       if (err)
+               i915_vma_unpin(wa_ctx->vma);
+err:
+       if (err == -EDEADLK) {
+               err = i915_gem_ww_ctx_backoff(&ww);
+               if (!err)
+                       goto retry;
+       }
+       i915_gem_ww_ctx_fini(&ww);
+
+       if (err) {
+               i915_vma_put(engine->wa_ctx.vma);
+               engine->wa_ctx.vma = NULL;
+       }
 }
 
 static void st_runtime_underflow(struct intel_context_stats *stats, s32 dt)
-- 
2.30.0

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