== Series Details ==

Series: drm/i915: refactor intel_display.c + a bit more (rev2)
URL   : https://patchwork.freedesktop.org/series/86723/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2685c66ddd72 drm/i915: migrate skl planes code new file (v5)
-:2738: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#2738: 
new file mode 100644

-:3213: CHECK:LINE_SPACING: Please don't use multiple blank lines
#3213: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:471:
+
+

-:3784: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#3784: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1042:
+                                 (plane_state->color_plane[1].y << 16) | 
plane_state->color_plane[1].x);

-:4091: CHECK:LINE_SPACING: Please don't use multiple blank lines
#4091: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1349:
+
+

-:4479: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or 
return
#4479: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1737:
+               return skl_planar_formats;
+       } else {

-:4492: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or 
return
#4492: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1750:
+               return glk_planar_formats;
+       } else {

-:4508: WARNING:UNNECESSARY_ELSE: else is not generally useful after a break or 
return
#4508: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:1766:
+               return icl_sdr_y_plane_formats;
+       } else {

-:4851: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#4851: FILE: drivers/gpu/drm/i915/display/skl_universal_plane.c:2109:
+               drm_plane_create_scaling_filter_property(&plane->base,
+                                               BIT(DRM_SCALING_FILTER_DEFAULT) 
|

total: 0 errors, 5 warnings, 3 checks, 4928 lines checked
bb3d788424ca drm/i915: move pipe update code into crtc. (v2)
-:247: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a 
separate line
#247: FILE: drivers/gpu/drm/i915/display/intel_crtc.c:541:
+        * while ... */

total: 0 errors, 1 warnings, 0 checks, 506 lines checked
4e167ec1a05f drm/i915: split fb scalable checks into g4x and skl versions
839eee02c59c drm/i915: move is_ccs_modifier to an inline
f98c7886db90 drm/i915: migrate pll enable/disable code to intel_dpll.[ch]
-:640: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see 
Documentation/timers/timers-howto.rst
#640: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1399:
+       udelay(150);

-:658: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see 
Documentation/timers/timers-howto.rst
#658: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1417:
+               udelay(150); /* wait for warmup */

-:699: CHECK:USLEEP_RANGE: usleep_range is preferred over udelay; see 
Documentation/timers/timers-howto.rst
#699: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1458:
+       udelay(150);

-:724: CHECK:LINE_SPACING: Please don't use multiple blank lines
#724: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1483:
+
+

-:808: WARNING:LONG_LINE: line length of 106 exceeds 100 columns
#808: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1567:
+                      pipe_config->dpll_hw_state.dpll & ~(DPLL_VCO_ENABLE | 
DPLL_EXT_BUFFER_ENABLE_VLV));

-:861: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#861: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1620:
+               vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW10(pipe),
+                                0x009f0003);

-:864: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#864: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1623:
+               vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW10(pipe),
+                                0x00d0000f);

-:870: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#870: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1629:
+                       vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW5(pipe),
+                                        0x0df40000);

-:873: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#873: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1632:
+                       vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW5(pipe),
+                                        0x0df70000);

-:878: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#878: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1637:
+                       vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW5(pipe),
+                                        0x0df70000);

-:881: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#881: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1640:
+                       vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW5(pipe),
+                                        0x0df40000);

-:929: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#929: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1688:
+       vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW13(port),
+                       5 << DPIO_CHV_S1_DIV_SHIFT |

-:939: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#939: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1698:
+       vlv_dpio_write(dev_priv, pipe, CHV_PLL_DW1(port),
+                       DPIO_CHV_M1_DIV_BY_2 |

-:994: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#994: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1753:
+       vlv_dpio_write(dev_priv, pipe, CHV_CMN_DW14(port),
+                       vlv_dpio_read(dev_priv, pipe, CHV_CMN_DW14(port)) |

-:1098: CHECK:LINE_SPACING: Please don't use multiple blank lines
#1098: FILE: drivers/gpu/drm/i915/display/intel_dpll.c:1857:
+
+

total: 0 errors, 1 warnings, 14 checks, 1110 lines checked
2758eb6d6841 drm/i915: migrate i9xx plane get config
a69fe8588de2 drm/i915: refactor skylake scaler code into new file.
-:709: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#709: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 1254 lines checked
f08f7fd56aa6 drm/i915: move ddi pll state get to dpll mgr
-:268: WARNING:LONG_LINE: line length of 108 exceeds 100 columns
#268: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:4685:
+       clk_sel = intel_de_read(dev_priv, DG1_DPCLKA_CFGCR0(phy)) & 
DG1_DPCLKA_CFGCR0_DDI_CLK_SEL_MASK(phy);

-:369: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis
#369: FILE: drivers/gpu/drm/i915/display/intel_dpll_mgr.c:4786:
+static void bxt_get_ddi_pll(struct drm_i915_private *dev_priv,
+                               enum port port,

total: 0 errors, 1 warnings, 1 checks, 463 lines checked


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