On Tue, 02 Mar 2021, Ville Syrjälä <ville.syrj...@linux.intel.com> wrote:
> On Tue, Mar 02, 2021 at 12:25:00PM +0200, Jani Nikula wrote:
>> On Mon, 22 Feb 2021, Jani Nikula <jani.nik...@intel.com> wrote:
>> > On Mon, 22 Feb 2021, "Shankar, Uma" <uma.shan...@intel.com> wrote:
>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
>> >>> b/drivers/gpu/drm/i915/display/intel_display_types.h
>> >>> index 71611b596c88..5564db512d22 100644
>> >>> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
>> >>> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
>> >>> @@ -1161,6 +1161,13 @@ struct intel_crtc_state {
>> >>> u8 pipeline_full;
>> >>> u16 flipline, vmin, vmax;
>> >>> } vrr;
>> >>> +
>> >>> + /* Stream Splitter for eDP MSO */
>> >>> + struct {
>> >>> + bool enable;
>> >>> + u8 link_count;
>> >>> + u8 pixel_overlap;
>> >>> + } splitter;
>> >>
>> >> For DSI which also has this in common along with MSO, may be we can
>> >> take these link_count and pixel_overlap out of splitter which is more
>> >> of a MSO feature. Thoughts ?
>> >
>> > Ville suggested the same I think.
>>
>> Coming back to this. DSI does not actually use crtc state for this
>> currently. But it does use the display stream splitter. The register is
>> different, but the functionality is roughly the same.
>>
>> I suggest we keep the "splitter" substruct as above, and convert DSI
>> code to use it in follow-up.
>>
>> In early versions of the patch the substruct was called "mso"; I think
>> "splitter" is better, and captures both MSO and DSI cases.
>
> The "splitter" name is rather icl+ specific. Earlier DSI or LVDS do not
> have such a hw block (at least in name).
Sigh, well, VLV has pixel overlap in VLV_CHICKEN_3 register.
I think we either organize this under "splitter", or throw all of this
in crtc state unorganized without substructs or prefixes or clues how
the members relate to each other on any platform.
BR,
Jani.
--
Jani Nikula, Intel Open Source Graphics Center
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