[Intel-gfx] [PATCH 08/19] drm/i915: Move LP1+ watermark merging out from hsw_compute_wm_results()

[ville . syrjala]

From: Ville Syrjälä <ville.syrj...@linux.intel.com>

I want to convert hsw_find_best_result() to use intel_pipe_wm, so we
need to move the merging to happen outside hsw_compute_wm_results().

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 1fb904a..b538d09 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -2697,26 +2697,23 @@ static void ilk_wm_merge(struct drm_device *dev,
 }
 
 static void hsw_compute_wm_results(struct drm_device *dev,
-                                  const struct hsw_wm_maximums *lp_maximums,
+                                  const struct intel_pipe_wm *lp_wm,
                                   struct hsw_wm_values *results)
 {
        struct intel_crtc *intel_crtc;
        int level, wm_lp;
-       struct intel_pipe_wm lp_wm = {};
-
-       ilk_wm_merge(dev, lp_maximums, &lp_wm);
 
        memset(results, 0, sizeof(*results));
 
-       results->enable_fbc_wm = lp_wm.fbc_wm_enabled;
+       results->enable_fbc_wm = lp_wm->fbc_wm_enabled;
 
        /* LP1+ register values */
        for (wm_lp = 1; wm_lp <= 3; wm_lp++) {
                const struct intel_wm_level *r;
 
-               level = wm_lp + (wm_lp >= 2 && lp_wm.wm[4].enable);
+               level = wm_lp + (wm_lp >= 2 && lp_wm->wm[4].enable);
 
-               r = &lp_wm.wm[level];
+               r = &lp_wm->wm[level];
                if (!r->enable)
                        break;
 
@@ -2878,6 +2875,7 @@ static void haswell_update_wm(struct drm_crtc *crtc)
        struct hsw_wm_values results_1_2, results_5_6, *best_results;
        enum intel_ddb_partitioning partitioning;
        struct intel_pipe_wm pipe_wm = {};
+       struct intel_pipe_wm lp_wm_1_2 = {}, lp_wm_5_6 = {};
 
        hsw_compute_wm_parameters(crtc, &params, &lp_max_1_2, &lp_max_5_6);
 
@@ -2888,9 +2886,12 @@ static void haswell_update_wm(struct drm_crtc *crtc)
 
        intel_crtc->wm.active = pipe_wm;
 
-       hsw_compute_wm_results(dev, &lp_max_1_2, &results_1_2);
+       ilk_wm_merge(dev, &lp_max_1_2, &lp_wm_1_2);
+       ilk_wm_merge(dev, &lp_max_5_6, &lp_wm_5_6);
+
+       hsw_compute_wm_results(dev, &lp_wm_1_2, &results_1_2);
        if (lp_max_1_2.pri != lp_max_5_6.pri) {
-               hsw_compute_wm_results(dev, &lp_max_5_6, &results_5_6);
+               hsw_compute_wm_results(dev, &lp_wm_5_6, &results_5_6);
                best_results = hsw_find_best_result(&results_1_2, &results_5_6);
        } else {
                best_results = &results_1_2;
-- 
1.8.1.5

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