From: Ville Syrjälä <ville.syrj...@linux.intel.com>

We can simplify the vlv watermark sanitation by reusing the
second half of vlv_compute_pipe_wm() to convert the sanitized
raw watermarks into the proper form to be used as the
optimal/intermediate watermarks.

Also to be consistent with normal watermark computation the sanitized
watermarks should be all 0 for any disabled plane. Previously we
zeroed out the watermarks only up to the level (ie. PM2/5/DVDFS)
that was enabled.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/intel_pm.c | 15 ++++++---------
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index b2ebc5ff0007..6776fe41c44d 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6701,30 +6701,27 @@ void vlv_wm_sanitize(struct drm_i915_private *dev_priv)
                        to_intel_crtc_state(crtc->base.state);
                struct intel_plane_state *plane_state =
                        to_intel_plane_state(plane->base.state);
-               struct vlv_wm_state *wm_state = &crtc_state->wm.vlv.optimal;
-               const struct vlv_fifo_state *fifo_state =
-                       &crtc_state->wm.vlv.fifo_state;
                enum plane_id plane_id = plane->id;
-               int level;
+               int level, num_levels = intel_wm_num_levels(dev_priv);
 
                if (plane_state->uapi.visible)
                        continue;
 
-               for (level = 0; level < wm_state->num_levels; level++) {
+               for (level = 0; level < num_levels; level++) {
                        struct g4x_pipe_wm *raw =
                                &crtc_state->wm.vlv.raw[level];
 
                        raw->plane[plane_id] = 0;
-
-                       wm_state->wm[level].plane[plane_id] =
-                               vlv_invert_wm_value(raw->plane[plane_id],
-                                                   
fifo_state->plane[plane_id]);
                }
        }
 
        for_each_intel_crtc(&dev_priv->drm, crtc) {
                struct intel_crtc_state *crtc_state =
                        to_intel_crtc_state(crtc->base.state);
+               int ret;
+
+               ret = _vlv_compute_pipe_wm(crtc_state);
+               drm_WARN_ON(&dev_priv->drm, ret);
 
                crtc_state->wm.vlv.intermediate =
                        crtc_state->wm.vlv.optimal;
-- 
2.26.3

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