From: Anusha Srivatsa <anusha.sriva...@intel.com>
Set compress BPP in kernel while connector DP or eDP
Cc: Vandita Kulkarni <vandita.kulka...@intel.com>
Cc: Navare Manasi D <manasi.d.nav...@intel.com>
Signed-off-by: Anusha Srivatsa <anusha.sriva...@intel.com>
Signed-off-by: Patnana Venkata Sai <venkata.sai.patn...@intel.com>
---
drivers/gpu/drm/i915/display/intel_dp.c | 23 ++++++++++++++++++-----
1 file changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index f74f70691247b..a454ee4210866 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1241,9 +1241,15 @@ static int intel_dp_dsc_compute_config(struct intel_dp
*intel_dp,
pipe_config->lane_count = limits->max_lane_count;
if (intel_dp_is_edp(intel_dp)) {
- pipe_config->dsc.compressed_bpp =
- min_t(u16,
drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,
- pipe_config->pipe_bpp);
+ if (intel_dp->force_dsc_bpp) {
+ drm_dbg_kms(&dev_priv->drm,
+ "DSC BPC forced to %d",
intel_dp->force_dsc_bpp);
+ pipe_config->dsc.compressed_bpp =
intel_dp->force_dsc_bpp;
+ } else {
+ pipe_config->dsc.compressed_bpp =
+ min_t(u16,
drm_edp_dsc_sink_output_bpp(intel_dp->dsc_dpcd) >> 4,
+ pipe_config->pipe_bpp);
+ }
pipe_config->dsc.slice_count =
drm_dp_dsc_sink_max_slice_count(intel_dp->dsc_dpcd,
true);
@@ -1269,9 +1275,15 @@ static int intel_dp_dsc_compute_config(struct intel_dp
*intel_dp,
"Compressed BPP/Slice Count not
supported\n");
return -EINVAL;
}
- pipe_config->dsc.compressed_bpp = min_t(u16,
+ if (intel_dp->force_dsc_bpp) {
+ drm_dbg_kms(&dev_priv->drm,
+ "DSC BPC forced to %d\n",
intel_dp->force_dsc_bpp);
+ pipe_config->dsc.compressed_bpp =
intel_dp->force_dsc_bpp;
+ } else {
+ pipe_config->dsc.compressed_bpp = min_t(u16,
dsc_max_output_bpp >> 4,
pipe_config->pipe_bpp);
+ }
pipe_config->dsc.slice_count = dsc_dp_slice_count;
}
/*
@@ -1374,7 +1386,8 @@ intel_dp_compute_link_config(struct intel_encoder
*encoder,
* Pipe joiner needs compression upto display12 due to BW limitation.
DG2
* onwards pipe joiner can be enabled without compression.
*/
- drm_dbg_kms(&i915->drm, "Force DSC en = %d\n", intel_dp->force_dsc_en);
+ drm_dbg_kms(&i915->drm, "Force DSC en = %d\n Force DSC BPP = %d\n",
+ intel_dp->force_dsc_en, intel_dp->force_dsc_bpp);
if (ret || intel_dp->force_dsc_en || (DISPLAY_VER(i915) < 13 &&
pipe_config->bigjoiner)) {
ret = intel_dp_dsc_compute_config(intel_dp, pipe_config,
--
2.25.1
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