> -----Original Message-----
> From: Roper, Matthew D <matthew.d.ro...@intel.com>
> Sent: Friday, July 9, 2021 8:37 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Srivatsa, Anusha <anusha.sriva...@intel.com>; Roper, Matthew D
> <matthew.d.ro...@intel.com>
> Subject: [PATCH v2 12/12] drm/i915/icl: Drop workarounds that only apply to
> pre-production steppings
>
> We're past the point at which we usually drop workarounds that were never
> needed on production hardware. The driver will already print an error and
> apply taint if loaded on pre-production hardware.
>
> Signed-off-by: Matt Roper <matthew.d.ro...@intel.com>
Definitely cleans up the code.
Reviewed-by: Anusha Srivatsa <anusha.sriva...@intel.com>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 39 ---------------------
> drivers/gpu/drm/i915/i915_drv.h | 3 --
> 2 files changed, 42 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 9b257a394305..5ace14cdfa85 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -517,21 +517,12 @@ static void cfl_ctx_workarounds_init(struct
> intel_engine_cs *engine, static void icl_ctx_workarounds_init(struct
> intel_engine_cs *engine,
> struct i915_wa_list *wal)
> {
> - struct drm_i915_private *i915 = engine->i915;
> -
> /* WaDisableBankHangMode:icl */
> wa_write(wal,
> GEN8_L3CNTLREG,
> intel_uncore_read(engine->uncore, GEN8_L3CNTLREG) |
> GEN8_ERRDETBCTRL);
>
> - /* Wa_1604370585:icl (pre-prod)
> - * Formerly known as WaPushConstantDereferenceHoldDisable
> - */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
> - wa_masked_en(wal, GEN7_ROW_CHICKEN2,
> - PUSH_CONSTANT_DEREF_DISABLE);
> -
> /* WaForceEnableNonCoherent:icl
> * This is not the same workaround as in early Gen9 platforms, where
> * lacking this could cause system hangs, but coherency performance
> @@ -541,18 +532,6 @@ static void icl_ctx_workarounds_init(struct
> intel_engine_cs *engine,
> */
> wa_masked_en(wal, ICL_HDC_MODE,
> HDC_FORCE_NON_COHERENT);
>
> - /* Wa_2006611047:icl (pre-prod)
> - * Formerly known as WaDisableImprovedTdlClkGating
> - */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
> - wa_masked_en(wal, GEN7_ROW_CHICKEN2,
> - GEN11_TDL_CLOCK_GATING_FIX_DISABLE);
> -
> - /* Wa_2006665173:icl (pre-prod) */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
> - wa_masked_en(wal, GEN11_COMMON_SLICE_CHICKEN3,
> - GEN11_BLEND_EMB_FIX_DISABLE_IN_RCC);
> -
> /* WaEnableFloatBlendOptimization:icl */
> wa_write_clr_set(wal,
> GEN10_CACHE_MODE_SS,
> @@ -982,18 +961,6 @@ icl_gt_workarounds_init(struct drm_i915_private
> *i915, struct i915_wa_list *wal)
> GEN8_GAMW_ECO_DEV_RW_IA,
> GAMW_ECO_DEV_CTX_RELOAD_DISABLE);
>
> - /* Wa_1405779004:icl (pre-prod) */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_A0))
> - wa_write_or(wal,
> - SLICE_UNIT_LEVEL_CLKGATE,
> - MSCUNIT_CLKGATE_DIS);
> -
> - /* Wa_1406838659:icl (pre-prod) */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
> - wa_write_or(wal,
> - INF_UNIT_LEVEL_CLKGATE,
> - CGPSF_CLKGATE_DIS);
> -
> /* Wa_1406463099:icl
> * Formerly known as WaGamTlbPendError
> */
> @@ -1669,12 +1636,6 @@ rcs_engine_wa_init(struct intel_engine_cs
> *engine, struct i915_wa_list *wal)
> PMFLUSH_GAPL3UNBLOCK |
> PMFLUSHDONE_LNEBLK);
>
> - /* Wa_1406609255:icl (pre-prod) */
> - if (IS_ICL_GT_STEP(i915, STEP_A0, STEP_B0))
> - wa_write_or(wal,
> - GEN7_SARCHKMD,
> - GEN7_DISABLE_DEMAND_PREFETCH);
> -
> /* Wa_1606682166:icl */
> wa_write_or(wal,
> GEN7_SARCHKMD,
> diff --git a/drivers/gpu/drm/i915/i915_drv.h
> b/drivers/gpu/drm/i915/i915_drv.h index 8682a5f557c5..da5f230e2d4b
> 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1513,9 +1513,6 @@ IS_SUBPLATFORM(const struct drm_i915_private
> *i915, #define IS_KBL_DISPLAY_STEP(dev_priv, since, until) \
> (IS_KABYLAKE(dev_priv) && IS_DISPLAY_STEP(dev_priv, since,
> until))
>
> -#define IS_ICL_GT_STEP(p, since, until) \
> - (IS_ICELAKE(p) && IS_GT_STEP(p, since, until))
> -
> #define IS_JSL_EHL_GT_STEP(p, since, until) \
> (IS_JSL_EHL(p) && IS_GT_STEP(p, since, until)) #define
> IS_JSL_EHL_DISPLAY_STEP(p, since, until) \
> --
> 2.25.4
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