Continuing the conversion from single integrated VBT data to two, now
handling eDP data.
Cc: Ville Syrjälä <ville.syrj...@linux.intel.com>
Cc: Jani Nikula <jani.nik...@intel.com>
Signed-off-by: José Roberto de Souza <jose.so...@intel.com>
---
drivers/gpu/drm/i915/display/g4x_dp.c | 9 +--
drivers/gpu/drm/i915/display/intel_bios.c | 62 +++++++++-------
drivers/gpu/drm/i915/display/intel_bios.h | 1 +
drivers/gpu/drm/i915/display/intel_ddi.c | 9 +--
.../drm/i915/display/intel_ddi_buf_trans.c | 71 ++++++++++---------
drivers/gpu/drm/i915/display/intel_dp.c | 7 +-
drivers/gpu/drm/i915/display/intel_pps.c | 4 +-
drivers/gpu/drm/i915/i915_drv.h | 24 +++----
8 files changed, 101 insertions(+), 86 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c
b/drivers/gpu/drm/i915/display/g4x_dp.c
index de0f358184aa3..273bc5295ae33 100644
--- a/drivers/gpu/drm/i915/display/g4x_dp.c
+++ b/drivers/gpu/drm/i915/display/g4x_dp.c
@@ -340,6 +340,7 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
u32 tmp, flags = 0;
enum port port = encoder->port;
struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
+ struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (encoder->type == INTEL_OUTPUT_EDP)
pipe_config->output_types |= BIT(INTEL_OUTPUT_EDP);
@@ -396,8 +397,8 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
intel_dotclock_calculate(pipe_config->port_clock,
&pipe_config->dp_m_n);
- if (intel_dp_is_edp(intel_dp) && dev_priv->vbt.edp.bpp &&
- pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
+ if (intel_dp_is_edp(intel_dp) && vbt_edp_info->bpp &&
+ pipe_config->pipe_bpp > vbt_edp_info->bpp) {
/*
* This is a big fat ugly hack.
*
@@ -413,8 +414,8 @@ static void intel_dp_get_config(struct intel_encoder
*encoder,
*/
drm_dbg_kms(&dev_priv->drm,
"pipe has %d bpp for eDP panel, overriding
BIOS-provided max %d bpp\n",
- pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
- dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
+ pipe_config->pipe_bpp, vbt_edp_info->bpp);
+ vbt_edp_info->bpp = pipe_config->pipe_bpp;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
b/drivers/gpu/drm/i915/display/intel_bios.c
index 6770ed8b260be..f0d49af8be036 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.c
+++ b/drivers/gpu/drm/i915/display/intel_bios.c
@@ -786,45 +786,45 @@ parse_power_conservation_features(struct drm_i915_private
*i915,
info->drrs_type = DRRS_NOT_SUPPORTED;
if (bdb->version >= 232)
- i915->vbt.edp.hobl = power->hobl & BIT(panel_index);
+ info->edp.hobl = power->hobl & BIT(panel_index);
}
static void
-parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb)
+parse_edp(struct drm_i915_private *i915, const struct bdb_header *bdb,
+ struct ddi_vbt_port_info *info, int panel_index)
{
const struct bdb_edp *edp;
const struct edp_power_seq *edp_pps;
const struct edp_fast_link_params *edp_link_params;
- int panel_type = i915->vbt.panel_type;
edp = find_section(bdb, BDB_EDP);
if (!edp)
return;
- switch ((edp->color_depth >> (panel_type * 2)) & 3) {
+ switch ((edp->color_depth >> (panel_index * 2)) & 3) {
case EDP_18BPP:
- i915->vbt.edp.bpp = 18;
+ info->edp.bpp = 18;
break;
case EDP_24BPP:
- i915->vbt.edp.bpp = 24;
+ info->edp.bpp = 24;
break;
case EDP_30BPP:
- i915->vbt.edp.bpp = 30;
+ info->edp.bpp = 30;
break;
}
/* Get the eDP sequencing and link info */
- edp_pps = &edp->power_seqs[panel_type];
- edp_link_params = &edp->fast_link_params[panel_type];
+ edp_pps = &edp->power_seqs[panel_index];
+ edp_link_params = &edp->fast_link_params[panel_index];
- i915->vbt.edp.pps = *edp_pps;
+ info->edp.pps = *edp_pps;
switch (edp_link_params->rate) {
case EDP_RATE_1_62:
- i915->vbt.edp.rate = DP_LINK_BW_1_62;
+ info->edp.rate = DP_LINK_BW_1_62;
break;
case EDP_RATE_2_7:
- i915->vbt.edp.rate = DP_LINK_BW_2_7;
+ info->edp.rate = DP_LINK_BW_2_7;
break;
default:
drm_dbg_kms(&i915->drm,
@@ -835,13 +835,13 @@ parse_edp(struct drm_i915_private *i915, const struct
bdb_header *bdb)
switch (edp_link_params->lanes) {
case EDP_LANE_1:
- i915->vbt.edp.lanes = 1;
+ info->edp.lanes = 1;
break;
case EDP_LANE_2:
- i915->vbt.edp.lanes = 2;
+ info->edp.lanes = 2;
break;
case EDP_LANE_4:
- i915->vbt.edp.lanes = 4;
+ info->edp.lanes = 4;
break;
default:
drm_dbg_kms(&i915->drm,
@@ -852,16 +852,16 @@ parse_edp(struct drm_i915_private *i915, const struct
bdb_header *bdb)
switch (edp_link_params->preemphasis) {
case EDP_PREEMPHASIS_NONE:
- i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
+ info->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
break;
case EDP_PREEMPHASIS_3_5dB:
- i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
+ info->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
break;
case EDP_PREEMPHASIS_6dB:
- i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
+ info->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
break;
case EDP_PREEMPHASIS_9_5dB:
- i915->vbt.edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
+ info->edp.preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
break;
default:
drm_dbg_kms(&i915->drm,
@@ -872,16 +872,16 @@ parse_edp(struct drm_i915_private *i915, const struct
bdb_header *bdb)
switch (edp_link_params->vswing) {
case EDP_VSWING_0_4V:
- i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
+ info->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
break;
case EDP_VSWING_0_6V:
- i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
+ info->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
break;
case EDP_VSWING_0_8V:
- i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
+ info->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
break;
case EDP_VSWING_1_2V:
- i915->vbt.edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
+ info->edp.vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
break;
default:
drm_dbg_kms(&i915->drm,
@@ -895,11 +895,11 @@ parse_edp(struct drm_i915_private *i915, const struct
bdb_header *bdb)
/* Don't read from VBT if module parameter has valid value*/
if (i915->params.edp_vswing) {
- i915->vbt.edp.low_vswing =
+ info->edp.low_vswing =
i915->params.edp_vswing == 1;
} else {
- vswing = (edp->edp_vswing_preemph >> (panel_type * 4))
& 0xF;
- i915->vbt.edp.low_vswing = vswing == 0;
+ vswing = (edp->edp_vswing_preemph >> (panel_index * 4))
& 0xF;
+ info->edp.low_vswing = vswing == 0;
}
}
}
@@ -1989,6 +1989,7 @@ static void parse_integrated_panel(struct
drm_i915_private *i915,
parse_driver_features_drrs_only(i915, bdb, info);
parse_panel_dtd(i915, bdb, info, panel_index);
parse_lfp_backlight(i915, bdb, info, panel_index);
+ parse_edp(i915, bdb, info, panel_index);
}
static void parse_ddi_port(struct drm_i915_private *i915,
@@ -2485,7 +2486,6 @@ void intel_bios_init(struct drm_i915_private *i915)
parse_panel_type(i915, bdb);
parse_sdvo_panel_data(i915, bdb);
parse_driver_features(i915, bdb);
- parse_edp(i915, bdb);
parse_psr(i915, bdb);
parse_mipi_config(i915, bdb);
parse_mipi_sequence(i915, bdb);
@@ -3132,3 +3132,11 @@ intel_bios_backlight_info(struct intel_encoder *encoder)
return &i915->vbt.ddi_port_info[encoder->port].backlight;
}
+
+struct vbt_edp_info *
+intel_bios_edp_info(struct intel_encoder *encoder)
+{
+ struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+
+ return &i915->vbt.ddi_port_info[encoder->port].edp;
+}
diff --git a/drivers/gpu/drm/i915/display/intel_bios.h
b/drivers/gpu/drm/i915/display/intel_bios.h
index 5b6167c97a8d9..8fd9b52f921f7 100644
--- a/drivers/gpu/drm/i915/display/intel_bios.h
+++ b/drivers/gpu/drm/i915/display/intel_bios.h
@@ -269,5 +269,6 @@ int intel_bios_encoder_hdmi_boost_level(const struct
intel_bios_encoder_data *de
enum drrs_support_type intel_bios_drrs_type(struct intel_encoder *encoder);
const struct drm_display_mode *intel_bios_lfp_lvds_info(struct intel_encoder
*encoder);
const struct vbt_backlight_info *intel_bios_backlight_info(struct
intel_encoder *encoder);
+struct vbt_edp_info *intel_bios_edp_info(struct intel_encoder *encoder);
#endif /* _INTEL_BIOS_H_ */
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 26a3aa73fcc43..22c089afe3485 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3645,6 +3645,7 @@ static void intel_ddi_get_config(struct intel_encoder
*encoder,
struct intel_crtc_state *pipe_config)
{
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
enum transcoder cpu_transcoder = pipe_config->cpu_transcoder;
/* XXX: DSI transcoder paranoia */
@@ -3669,8 +3670,8 @@ static void intel_ddi_get_config(struct intel_encoder
*encoder,
pipe_config->has_audio =
intel_ddi_is_audio_enabled(dev_priv, cpu_transcoder);
- if (encoder->type == INTEL_OUTPUT_EDP && dev_priv->vbt.edp.bpp &&
- pipe_config->pipe_bpp > dev_priv->vbt.edp.bpp) {
+ if (encoder->type == INTEL_OUTPUT_EDP && vbt_edp_info->bpp &&
+ pipe_config->pipe_bpp > vbt_edp_info->bpp) {
/*
* This is a big fat ugly hack.
*
@@ -3686,8 +3687,8 @@ static void intel_ddi_get_config(struct intel_encoder
*encoder,
*/
drm_dbg_kms(&dev_priv->drm,
"pipe has %d bpp for eDP panel, overriding
BIOS-provided max %d bpp\n",
- pipe_config->pipe_bpp, dev_priv->vbt.edp.bpp);
- dev_priv->vbt.edp.bpp = pipe_config->pipe_bpp;
+ pipe_config->pipe_bpp, vbt_edp_info->bpp);
+ vbt_edp_info->bpp = pipe_config->pipe_bpp;
}
if (!pipe_config->bigjoiner_slave)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
index 63b1ae830d9a0..8ac04cd7ceeee 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi_buf_trans.c
@@ -1125,14 +1125,14 @@ bdw_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG))
return intel_get_buf_trans(&bdw_ddi_translations_fdi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&bdw_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return intel_get_buf_trans(&bdw_ddi_translations_edp,
n_entries);
else
return intel_get_buf_trans(&bdw_ddi_translations_dp, n_entries);
@@ -1162,12 +1162,12 @@ skl_y_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_y_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_y_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder,
&skl_y_ddi_translations_dp, n_entries);
@@ -1178,12 +1178,12 @@ skl_u_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_u_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder,
&skl_u_ddi_translations_dp, n_entries);
@@ -1194,12 +1194,12 @@ skl_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder, &skl_ddi_translations_dp,
n_entries);
@@ -1210,12 +1210,12 @@ kbl_y_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_y_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_y_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder,
&kbl_y_ddi_translations_dp, n_entries);
@@ -1226,12 +1226,12 @@ kbl_u_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_u_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder,
&kbl_u_ddi_translations_dp, n_entries);
@@ -1242,12 +1242,12 @@ kbl_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&skl_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return _skl_get_buf_trans_dp(encoder,
&skl_ddi_translations_edp, n_entries);
else
return _skl_get_buf_trans_dp(encoder, &kbl_ddi_translations_dp,
n_entries);
@@ -1258,12 +1258,12 @@ bxt_get_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return intel_get_buf_trans(&bxt_ddi_translations_hdmi,
n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- i915->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return intel_get_buf_trans(&bxt_ddi_translations_edp,
n_entries);
else
return intel_get_buf_trans(&bxt_ddi_translations_dp, n_entries);
@@ -1316,10 +1316,11 @@ cnl_get_buf_trans_dp(struct intel_encoder *encoder, int
*n_entries)
static const struct intel_ddi_buf_trans *
cnl_get_buf_trans_edp(struct intel_encoder *encoder, int *n_entries)
{
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
u32 voltage = intel_de_read(dev_priv, CNL_PORT_COMP_DW3) &
VOLTAGE_INFO_MASK;
- if (dev_priv->vbt.edp.low_vswing) {
+ if (vbt_edp_info->low_vswing) {
if (voltage == VOLTAGE_INFO_0_85V) {
return
intel_get_buf_trans(&cnl_ddi_translations_edp_0_85V,
n_entries);
@@ -1365,12 +1366,12 @@ icl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (crtc_state->port_clock > 540000) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
- } else if (dev_priv->vbt.edp.low_vswing) {
+ } else if (vbt_edp_info->low_vswing) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
n_entries);
}
@@ -1432,12 +1433,12 @@ ehl_get_combo_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi, n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- dev_priv->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return ehl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
return intel_get_buf_trans(&ehl_combo_phy_ddi_translations_dp,
n_entries);
@@ -1459,12 +1460,12 @@ jsl_get_combo_buf_trans(struct intel_encoder *encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_hdmi, n_entries);
else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) &&
- dev_priv->vbt.edp.low_vswing)
+ vbt_edp_info->low_vswing)
return jsl_get_combo_buf_trans_edp(encoder, crtc_state,
n_entries);
else
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
@@ -1496,16 +1497,16 @@ tgl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
if (crtc_state->port_clock > 540000) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
- } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
+ } else if (vbt_edp_info->hobl && !intel_dp->hobl_failed) {
return
intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,
n_entries);
- } else if (dev_priv->vbt.edp.low_vswing) {
+ } else if (vbt_edp_info->low_vswing) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
n_entries);
}
@@ -1544,16 +1545,16 @@ dg1_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
if (crtc_state->port_clock > 540000)
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
- else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed)
+ else if (vbt_edp_info->hobl && !intel_dp->hobl_failed)
return
intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,
n_entries);
- else if (dev_priv->vbt.edp.low_vswing)
+ else if (vbt_edp_info->low_vswing)
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
n_entries);
else
@@ -1589,16 +1590,16 @@ rkl_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
if (crtc_state->port_clock > 540000) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_dp_hbr2_edp_hbr3,
n_entries);
- } else if (dev_priv->vbt.edp.hobl && !intel_dp->hobl_failed) {
+ } else if (vbt_edp_info->hobl && !intel_dp->hobl_failed) {
return
intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl,
n_entries);
- } else if (dev_priv->vbt.edp.low_vswing) {
+ } else if (vbt_edp_info->low_vswing) {
return
intel_get_buf_trans(&icl_combo_phy_ddi_translations_edp_hbr2,
n_entries);
}
@@ -1635,14 +1636,14 @@ adls_get_combo_buf_trans_edp(struct intel_encoder
*encoder,
const struct intel_crtc_state *crtc_state,
int *n_entries)
{
- struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
if (crtc_state->port_clock > 540000)
return
intel_get_buf_trans(&adls_combo_phy_ddi_translations_edp_hbr3, n_entries);
- else if (i915->vbt.edp.hobl && !intel_dp->hobl_failed)
+ else if (vbt_edp_info->hobl && !intel_dp->hobl_failed)
return
intel_get_buf_trans(&tgl_combo_phy_ddi_translations_edp_hbr2_hobl, n_entries);
- else if (i915->vbt.edp.low_vswing)
+ else if (vbt_edp_info->low_vswing)
return
intel_get_buf_trans(&adls_combo_phy_ddi_translations_edp_hbr2, n_entries);
else
return adls_get_combo_buf_trans_dp(encoder, crtc_state,
n_entries);
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
index 79d4e3edb2eef..27a0f93fb283f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp.c
+++ b/drivers/gpu/drm/i915/display/intel_dp.c
@@ -1009,6 +1009,7 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
{
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct intel_connector *intel_connector = intel_dp->attached_connector;
+ struct vbt_edp_info *vbt_edp_info =
intel_bios_edp_info(intel_connector->encoder);
int bpp, bpc;
bpc = crtc_state->pipe_bpp / 3;
@@ -1027,11 +1028,11 @@ static int intel_dp_max_bpp(struct intel_dp *intel_dp,
if (intel_dp_is_edp(intel_dp)) {
/* Get bpp from vbt only for panels that dont have bpp in edid
*/
if (intel_connector->base.display_info.bpc == 0 &&
- dev_priv->vbt.edp.bpp && dev_priv->vbt.edp.bpp < bpp) {
+ vbt_edp_info->bpp && vbt_edp_info->bpp < bpp) {
drm_dbg_kms(&dev_priv->drm,
"clamping bpp for eDP panel to
BIOS-provided %i\n",
- dev_priv->vbt.edp.bpp);
- bpp = dev_priv->vbt.edp.bpp;
+ vbt_edp_info->bpp);
+ bpp = vbt_edp_info->bpp;
}
}
diff --git a/drivers/gpu/drm/i915/display/intel_pps.c
b/drivers/gpu/drm/i915/display/intel_pps.c
index 96894d70a92c1..f4c15a1f31d15 100644
--- a/drivers/gpu/drm/i915/display/intel_pps.c
+++ b/drivers/gpu/drm/i915/display/intel_pps.c
@@ -1161,6 +1161,8 @@ intel_pps_verify_state(struct intel_dp *intel_dp)
static void pps_init_delays(struct intel_dp *intel_dp)
{
+ struct intel_encoder *encoder = &dp_to_dig_port(intel_dp)->base;
+ const struct vbt_edp_info *vbt_edp_info = intel_bios_edp_info(encoder);
struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
struct edp_power_seq cur, vbt, spec,
*final = &intel_dp->pps.pps_delays;
@@ -1175,7 +1177,7 @@ static void pps_init_delays(struct intel_dp *intel_dp)
intel_pps_dump_state("cur", &cur);
- vbt = dev_priv->vbt.edp.pps;
+ vbt = vbt_edp_info->pps;
/* On Toshiba Satellite P50-C-18C system the VBT T12 delay
* of 500ms appears to be too short. Ocassionally the panel
* just fails to power back on. Increasing the delay to 800ms
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 047f0d2fc971f..0e957ba8046f2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -669,6 +669,18 @@ struct ddi_vbt_port_info {
u8 controller; /* brightness controller number */
enum intel_backlight_type type;
} backlight;
+
+ struct vbt_edp_info {
+ int rate;
+ int lanes;
+ int preemphasis;
+ int vswing;
+ bool low_vswing;
+ bool initialized;
+ int bpp;
+ struct edp_power_seq pps;
+ bool hobl;
+ } edp;
};
enum psr_lines_to_wait {
@@ -696,18 +708,6 @@ struct intel_vbt_data {
unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
enum drm_panel_orientation orientation;
- struct {
- int rate;
- int lanes;
- int preemphasis;
- int vswing;
- bool low_vswing;
- bool initialized;
- int bpp;
- struct edp_power_seq pps;
- bool hobl;
- } edp;
-
struct {
bool enable;
bool full_link;
--
2.32.0
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